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[00:10:05] <jepler> I just booked my ticket to the houston fest! I'll be there saturday through tuesday (arriving friday / leaving wednesday)
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[00:46:31] <Tom_itx> gawd i hate that airport
[00:46:56] <Tom_itx> but you won't be catching another flight there
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[00:52:21] <jepler> yeah, glad not to be
[00:53:24] <Tom_itx> i swear we had to run from one end to the other to catch the next flight (same airline)!
[00:54:29] <Tom_itx> btw if they ever have it here again we have (will have) a brand new terminal by then
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[01:25:51] <jepler> http://paste.debian.net/119038/
[01:25:59] <jepler> gonna disturb it to measure actual spi clocks, but that's a good run
[01:26:21] <jepler> whoops, times at
http://paste.debian.net/119039/
[01:26:28] <jepler> stepgen going at 1/s so that's 91k seconds run time
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[01:26:44] <jepler> = 364 million spi transactions
[01:32:33] <jepler> hm I must be wrong about the SPI clock source. I measure the SPI clock as ~31MHz
[01:32:37] <jepler> .. and nearly sinusoidal
[01:33:19] <jepler> with a proper 100MHz scope probe on the 7i90 side of the 6"ish ribbon cable
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[01:37:44] <jepler> signal swings to -.2V and +3.5v on a 3.3v supply
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[01:41:15] <jepler> static int spidev_rate[MAX_BOARDS] = { [0 ... MAX_BOARDS-1] = 24000 };
[01:41:15] <jepler> RTAPI_MP_ARRAY_STRING(spidev_rate, MAX_BOARDS, "SPI clock rate in kHz");
[01:41:18] <jepler> hah, spot the error
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[01:41:36] <jepler> it led to a wildly inappropriate spidev_rate
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[01:47:59] <jepler> a value between 36.5MHz and 37.0MHz; and a value between 31MHz and 31.5MHz seem to be the two adjacent clocks available as simple divisors of a higher clock
[01:48:27] <jepler> those are odd values
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[01:58:26] <skunkworks_> logger[
[01:58:31] <skunkworks_> logger[ps
[01:58:33] <skunkworks_> omg
[01:58:36] <skunkworks_> logger[psha]:
[02:01:35] <jepler> maybe it's the 880MHz "M" clock divided by 24 (36.7MHz) and 28 (31.43MHz)
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[02:02:52] <jepler> if that's true, then either my scope calibration is terrible or the u3 clocksource is terrible. the scope measures 31.97MHz average
[02:03:30] <jepler> yes, a division point between two clocks is 31428 / 31429, so that must be it
[02:04:39] <jepler> yep, and 44MHz (which actually seems to work too)
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[02:24:27] <jepler> pcw_home: so this is what the SPI CLK looks like at 8MHz-ish. did I fail at signal termination?
[02:24:52] <jepler> pcw_home: (the scope's own probe calibration output looks good and square-waved)
[02:26:25] <jepler> .. it seems to work fine, I was only looking at the waveform as the easiest way to find the actual SPI transmission rate
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[02:31:07] <Tom_itx> do you have a logic analizer?
[02:31:23] <Tom_itx> those are quite handy for looking at data
[02:32:20] <jepler> Tom_itx: this is what I have; it's a piece of junk:
http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer
[02:32:26] <jepler> someday I'll buy something better
[02:32:57] <Tom_itx> i'm waiting for saleae to come out with their new ones... i really like the old one i have
[02:33:21] <jepler> as infrequently as I actually do electronics it's hard to justify the expense
[02:33:42] <Tom_itx> if it was quicker i'd loan it
[02:33:56] <Tom_itx> https://www.saleae.com/
[02:34:08] <jepler> eh, don't sweat it
[02:34:16] <jepler> thanks though
[02:34:21] <Tom_itx> i forget the rate mine is but it's not up to the new standards
[02:34:29] <Tom_itx> it's just sitting in the drawer
[02:34:48] <Tom_itx> i used it to help get my programmer software working
[02:35:23] <jepler> the rate and storage specs of the open bench are not bad
[02:35:57] <Tom_itx> if it's the same one i'm thinking of, the software was the problem with it early on
[02:36:14] <jepler> but it has no proper probes, and no control over voltage levels
[02:36:14] <Tom_itx> or lack of..
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[02:36:26] <jepler> the software's all java but that's life .. today it works OK
[02:36:31] <jepler> triggering is poor though
[02:37:00] <jepler> any unattached scope probes just record digital noise, rendering the "RLE" mode useless
[02:37:39] <jepler> .. noise that readily couples into adjacent channels, since they're unpaired, unshielded wire
[02:38:10] <pcw_home> To actually see the signal you probably need a passive resistor divider probe and a 50 Ohm input (a 1GHz scope would not hurt either)
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[02:38:54] <Tom_itx> mine's an old analog 100Mhz
[02:39:25] <pcw_home> a 100/1 ~500 MHz probe can be done with a 4.99K 1% resistor at the end of some 50 Ohm coax
[02:39:54] <jepler> that trace is with a proper scope probe in 10x mode, not with the logic analyzer I was just busy dissing
[02:40:03] <pcw_home> _much_ better performance than any high impedance passive probe
[02:41:24] <pcw_home> a high impedance probe is not high impedance at high frequencies, a home made passive resistor divider probe is much better
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[02:41:43] <jepler> ok, so the short answer is that what I'm measuring is probably not useful to measure
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[02:42:12] <jepler> that's fine with me
[02:42:54] <pcw_home> a 15 pf probe has ~100 ohm reactance at 100 MHz
[02:45:02] <pcw_home> so the 50 Ohm 100/1 passive divide probe with a 5K input resistor beats the "high impedance" probe at anything more than 2 MHz
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[02:45:58] <jepler> pcw_home: what's the theoretical max SPI clock of the 7i90?
[02:46:19] <jepler> ah there it is
[02:46:20] <jepler> 50?
[02:46:50] <pcw_home> depends on clock to output timing and whether the master can delay the data sampling 1/2 clock
[02:47:52] <pcw_home> I got to 50 with another spartan6 FPGA with DBSPI hm2 firmware as master
[02:48:09] <jepler> The odroid's spi module is also limited to 50MHz, and the highest clock under 50MHz that is achievable is 44MHz
[02:48:12] <jepler> .. which seems to work
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[02:50:52] <pcw_home> If the SPI clock was free running and had all access control done with /CS you could go a lot faster
[02:51:33] <pcw_home> (since you could use a DCM and adjust the input and output clock phasing)
[02:52:02] <jepler> I just confirmed that the feedback clock has "180 degrees phase lagging"
[02:52:34] <pcw_home> Yeah that helps compensate for the delay
[02:52:43] <jepler> actually 270 could be selected
[02:53:20] <pcw_home> yeah skew removal...
[02:53:52] <jepler> (I mean, the choices are 0, 90, 180, 270. I'm confident it's 180 that's selected.)
[02:54:14] <pcw_home> too bad theres no standard for data dependent skew removal (sync to start bit on SPI data)
[02:54:37] <pcw_home> (MISO data)
[02:54:45] <jepler> yeah
[02:55:06] <jepler> and I haven't seen anything like the free running sclk mode you propose either
[02:55:36] <pcw_home> the BISS interface works like that (resync rx data clock on first bit)
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[02:55:50] <jepler> I meant in the arm chip's datasheet
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[02:56:39] <pcw_home> BISS is still a synchronous interface but the rx data is deskewed
[02:57:07] <pcw_home> since you may have along encoder cable and isolation delays
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[03:00:10] <pcw_home> still dont have a DPLL stepgen config tested yet, had a fair amount of rototilling to do to include it
[03:00:11] <pcw_home> I wanted a global timer select register so had to add that and a bit to make the sample latch transparent
[03:00:13] <pcw_home> but do have a bitfile for testing tommorow
[03:01:50] <pcw_home> I dont think Ive seen any SPI hardware masters that have continuous clocks (though some A/Ds want that)
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[03:03:46] <KGB-linuxcnc> 03Jeff Epler 05master ddbd05d 06linuxcnc Merge branch 'jepler/proposed-master' * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=ddbd05d
[03:03:54] <jepler> OK, hm2_spi in master branch. goodnight.
[03:04:08] <pcw_home> fantastic!
[03:04:33] <jepler> probably only one board in the world that can run it, until someone gets around to hacking all the SPI drivers :(
[03:04:40] <KGB-linuxcnc> 05jepler/proposed-master 70bb120 06linuxcnc 04. branch deleted * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=70bb120
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[03:48:47] <KGB-linuxcnc> 03Sebastian Kuzminsky 05master 052052d 06linuxcnc 10docs/man/man9/motion.9 docs: update motion manpage with new tc.h location * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=052052d
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[03:58:20] <seb_kuzminsky> jepler: here's your next fix:
[03:58:26] <seb_kuzminsky> 0 21:56:58 seb@steel /home/seb/linuxcnc.git> grep -ir RTSRCS *
[03:58:27] <seb_kuzminsky> src/Makefile:$(call ASSERT_EMPTY,$(filter-out %.c, $(RTSRCS)))
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[11:47:42] <lair82> Good Morning Gentlemen, I seem to be hitting a wall when updating my latest machine. Last week I did the same course of events on another machine, and had no issues, now I keep getting faults about " File "/home/cinci12mo/linuxcnc/python/toplevel.py", line 19, in <module> import remap ImportError: No module named remap Python plugin configure() failed, status = -11"
[11:49:17] <lair82> I have done a complete re-install twice of the software, and keep getting this. I have went thru and double checked the foldr paths and names and everything is correct.
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[11:56:24] <jepler> when the environment variable PYTHONVERBOSE is set to 2, Python will print each location it searches for a module to import (as well as reporting a lot of other things). I recommend running: PYTHONVERBOSE=2 linuxcnc path/to/your/config.ini, then inspecting the output for where it tries to import remap. The location where you've placed remap.py must not be the one that linuxcnc expects.
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[11:57:07] <jepler> the output may be lengthy, so if you can't scroll back that far in your terminal, google how to use output redirection to save the output to a file
[11:58:14] <jepler> and note that relative paths are relative to the configuration directory unless you've done something really unusual.
[11:58:51] <jepler> so for instance I see this when running the sample config axis/remap/getting-stated/demo.ini in master branch from a RIP install
http://paste.debian.net/119128/
[11:59:20] <lair82> i set that in the INI?
[11:59:42] <jepler> no, PYTHONVERBOSE is an environment setting; I showed you a shell command to set it temporarily just for one invocation of linuxcnc
[11:59:52] <jepler> PYTHONVERBOSE=2 linuxcnc
[12:00:02] <lair82> Oh, got it
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[14:34:09] <lair82> I have noticed a few things, first on one of my other machines, I did the same thing, copied it to gedit, and looked for where it accepted the file and found the following,
http://pastebin.com/raw.php?i=zk0xPDKw
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[14:36:10] <lair82> Now looking at the current machine, which is faulting, here is what I get,
http://pastebin.com/raw.php?i=LW8CzvRS
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[14:39:12] <lair82> I am not sure why it starts going to #trying /home/cinci12mo/linuxcnc-dev/lib/python/traceback.so , when on the other machine it goes to # trying /home/cinci15cc/linuxcnc/python/remap.so , finds the file, then life is good.
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[14:41:12] <pcw_home> probably because it loads the traceback when it cant find remap.py
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[14:42:26] <pcw_home> (it needs the traceback module to trace/print the error)
[14:42:52] <lair82> It doesn't make sense though, all the files are in the python folder
[14:43:09] <pcw_home> what does
[14:43:10] <pcw_home> locate remap.py
[14:43:12] <pcw_home> show
[14:44:07] <lair82> cinci12mo@cinci12mo:~/linuxcnc/python$ ls remap.py stdglue.py toplevel.py
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[14:46:14] <lair82> And here is my INI entry, TOPLEVEL= /home/cinci12mo/linuxcnc/python/toplevel.py , APPEND= /home/cinci12mo/linuxcnc/python
[14:46:22] <pcw_home> You must have an ini setting somewhere (in the working config) that told linuxcnc to look for the remap file there
[14:48:16] <pcw_home> you can see that the non working config never looks there
[14:49:37] <pcw_home> maybe a RIP issue:
[14:49:38] <pcw_home> trying /home/cinci12mo/linuxcnc-dev/lib/python/remap.py
[14:51:11] <lair82> That file is not in that directory.
[14:51:21] <pcw_home> so you could poke it there 'till someone smarter figures out the real issue
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[14:52:58] <lair82> I did do that, and it worked, I did not know if that was a good idea though.
[14:53:39] <pcw_home> is this a RIP build?
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[14:54:49] <lair82> yep
[14:55:39] <pcw_home> probably install would fix it
[14:55:57] <lair82> Install what?
[14:56:17] <pcw_home> instead of RIP
[14:56:27] <jepler> I'm going to interrupt with some "no"
[14:57:05] <jepler> two things -- first, if something works with an installed version and not with a RIP version, then we want to know what's going on and get it fixed
[14:57:50] <jepler> second, we recommend to use RIP *or* a package version, but we never recommend for a user to "make install" from their source tree; it seriously trashes the system.
[14:58:04] <jepler> http://mid.gmane.org/20140817171953.GC86118%40unpythonic.net
[14:58:30] <jepler> (you can build your own package and install it via dpkg, that's great and supported too -- but "make install" is never something to invoke directly)
[14:59:24] <lair82> I do know that the sim configs start up no problem
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[14:59:34] <lair82> if thats of any help
[15:00:36] <lair82> In regards to the remap, I set this up line for line from the integrators manual
[15:01:13] <lair82> Thats why I am lost, it has never failed like this before
[15:01:43] <jepler> do you have [PYTHON]PATH_PREPEND ?
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[15:05:08] <lair82> no
[15:05:26] <lair82> never have
[15:12:52] <lair82> Think I got it, in the past it looks like APPEND was all that was needed, now it needs to be PATH_APPEND,after I changed it, it starts fine.
[15:14:37] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 b5442ee 06linuxcnc 10src/Makefile build system: remove useless assert * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=b5442ee
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[15:17:56] <lair82> Is PATH_PREPEND required?
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[15:23:27] <skunkworks> jepler, can you take a picture of your setup? odroid+board+mesa?
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[15:44:01] <jepler> skunkworks:
http://emergent.unpythonic.net/files/sandbox/img_4910.jpg with bonus artsy soft focus
[15:44:33] <skunkworks> jepler, awesome!
[15:44:51] <skunkworks> so - you are only using 2 or so pins of the ribbon cable?
[15:45:10] <jepler> 4 pins + all the grounds (about 8)
[15:46:38] <jepler> also we tested last night that communication is not disrupted with a vacuum cleaner 2' away :-P
[15:48:38] <jepler> I see APPEND is mentioned in the docs. I'll fix that.
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[15:50:23] <jepler> lair82: the Python import statement looks in an ordered list of paths. In remap, [PYTHON]PATH_PREPEND puts items at the start, and [PYTHON]PATH_APPEND puts them at the end. The distinction is important if the same module could be found in multiple locations..
[15:51:07] <lair82> Ok, Thought I was losing it for the last day and a half, how long ago did that change?
[15:51:16] <jepler> no idea
[15:51:36] <lair82> Ok, no big deal,
[15:51:54] <lair82> Thanks for the help though,
[15:52:20] <jepler> OK
[15:52:36] <jepler> I don't actually see any evidence in git history that [PYTHON]APPEND ever did anything
[15:53:19] <KGB-linuxcnc> 03Jeff Epler 052.6 34a59fd 06linuxcnc 10docs/src/remap/structure.txt remap docs: The inifile var is PYTHON_APPEND * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=34a59fd
[15:55:24] <lair82> The config i'm working on worked last week before I did a fresh install, I installed a new MB with a new A4-4020 processor, and the software wouldnot start up, so I re-installed the software, and this is where I ended up.
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[19:02:59] <KGB-linuxcnc> 03Jeff Epler 05master e8de7f5 06linuxcnc 10src/Makefile Merge remote-tracking branch 'origin/2.6' * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=e8de7f5
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[19:13:36] <jepler> wow, I just discovered a mistake in the Makefile which trims 18 CPU seconds off a build from clean
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[19:14:05] <jepler> on my beefy machine it turns a (fully ccached) build from 10 wall-clock seconds to 4
[19:15:51] <PCW> Ha! the Smootherator works!
[19:16:38] <jepler> PCW: cool!
[19:17:21] <jepler> is it a "you can hear the difference" or a "you can scope the difference"?
[19:17:38] <PCW> now the stepgen is tunable to <100 u error at 30 IPS
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[19:18:32] <PCW> no raspy "following error" which is really just sampling time error
[19:19:13] <jepler> It occurs to me that hm2's write function could in principle wait for a certain time within the period
[19:19:29] <jepler> .. reducing the variation in write time by some amount, at the expense of CPU utilization
[19:19:48] <jepler> easier to do if I get around to introducing a get nominal thread start time API
[19:20:57] <PCW> yeah but on feedback systems the write time is less important then the read (sample) time
[19:22:19] <PCW> i had to set the sample time to 50 usec before nominal linuxcnc read time to account for worst case baseline wander
[19:23:45] <PCW> (and raw write the stepgen DPLL sample enable register/timer channel select register)
[19:25:33] <jepler> bbl
[19:25:52] <jepler> I'd better get mesaflash spi working, then I can try one of these firmwares
[19:26:07] <jepler> see what it takes to get the DPLL activation working in the hal driver
[19:26:33] <PCW> you can flash via EPP
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[19:31:20] <PCW> DPLL already works (at least on hm2_eth)
[19:31:22] <PCW> only added feature is global 4 bit register 15 downto 12) =
[19:31:23] <PCW> DPLL_SAMPLE_ENABLE, 3 select bits to specify which DPLL timer channels is selected
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[19:32:42] <skunkworks> smootherator?
[19:33:52] <PCW> Have you noticed the latency related hash on the stepgen position feedback with hm2_eth?
[19:34:48] <PCW> (and magnitude proportional to velocity)
[19:38:15] <PCW> Just added the option of sampling the stepgens feedback with the DPLL instead of
[19:38:16] <PCW> when linuxcnc does the read. This removes almost all of the sampling jitter
[19:40:03] <PCW> you do need to add a bit more FF2 to the PID since the time between sampling the position and applying the correction is longer
[19:49:27] <skunkworks> cool!
[19:49:42] <skunkworks> The things you do for those darn stepper people!
[19:49:45] <skunkworks> ;)
[19:50:09] <Tom_itx> oh hush
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[19:55:27] <PCW> eventually I will add this option to the encoder as well :-)
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[19:58:20] <PCW> on Ethernet I was able to reduce the ferror settings from 2 and 5 mills to 0.5 and 1.0 mills (for 30 IPS max)
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[19:59:20] <PCW> (and can probably go lower)
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[20:34:52] <jepler> PCW: yes, I actually used the stepgen fb position derivative as a check on latency
[20:35:38] <jepler> stepgen fb as a timestamp I trusted
[20:42:32] <PCW> should be a big improvement on Preemt_RT systems (bogus stepgen velocity corrections reduced substantially)
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[20:43:51] <PCW> even say 1/2 ms delay could be tolerated on a 1 KHz loop
[20:44:20] <PCW> just makes things a lot less picky
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[20:48:07] <PCW> theres' a (global) bit you can set/clear to enable/disable the DPLL sampling so you dont lose the ability to use the stepgen for latency checking
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[21:14:33] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 130b19d 06linuxcnc 10docs/src/Submakefile build: only do docclean when doc building enabled * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=130b19d
[21:14:33] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 099ebfa 06linuxcnc 10src/Makefile build: give EXTRAFLAGS an empty definition * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=099ebfa
[21:14:33] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 3e2dc97 06linuxcnc 10src/Makefile build: Unconditionally enable -fno-strict-aliasing * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=3e2dc97
[21:14:35] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master eed53cb 06linuxcnc 10src/Makefile build: compute EXTRA_CFLAGS just once * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=eed53cb
[21:14:39] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 0bb3018 06linuxcnc 10src/Makefile build: Warn about use of undefined variables * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=0bb3018
[21:14:43] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 6600418 06linuxcnc 10src/Makefile build: correctly check for 'make -s' silent build * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=6600418
[21:14:47] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master bd6bb34 06linuxcnc 10src/Makefile build: Honor silent mode when it comes to informing about dependency info * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=bd6bb34
[21:14:51] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 87f9c52 06linuxcnc 10src/Makefile build: don't bother reading legacy (2.5)-style dependencies * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=87f9c52
[21:14:55] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 47e9e1f 06linuxcnc 10src/Makefile build: provide empty EXTRA_DEBUG by default, but allow overriding from make commandline * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=47e9e1f
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[21:15:10] <jepler> another 70 kiloseconds of good spi behavior
[21:15:13] <jepler> at 44MHz no less
[21:18:02] <PCW> with direct 1.8V SPI I/O (and a direct connection) >50 MHz should be possible (assuming you can generate the clocks)
[21:19:04] <PCW> on the other hand unless you have a _lot_ of I/O 44 Mbits/sec is plenty for motion control
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[21:19:24] <jepler> it sems that 44MHz is the top clock I can select. Every clock I have seen seems to be 220MHz/k for some k
[21:19:40] <jepler> and also at this point the overhead is longer than the transmission time by a fair bit
[21:19:58] <PCW> some division of the CPU clock?
[21:20:01] <jepler> I think I'm reading 27 or 28 words, which shold be about 20us
[21:20:13] <jepler> but the typical write time is still around 80us
[21:20:30] <jepler> so going up to 50/60/80MHz is not going to make a difference
[21:20:35] <PCW> yeah that the disadvantage of using the driver
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[21:21:49] <jepler> PCW: I haven't studied the clock distribution system in this thing much but dmesg says the "M" clock is 880MHz. Not particularly related to the CPU frequency of 1704000MHz
[21:22:49] <PCW> Yeah normally there are pretty fancy clock trees in these cell-phone/tablet SOCs for power management
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[21:25:02] <PCW> The SPI slave could do full duplex with some futzing, not sure if its worth the trouble though
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[21:25:46] <PCW> (since it does not fit in the read/process/write model very well)
[21:26:04] <jepler> yeah
[21:26:46] <jepler> I wonder if we can shift feedback by another servo period, so do the write and read all at once
[21:29:05] <PCW> a bit painful unless you lose a lot of overhead
[21:29:21] <jepler> maybe 50us?
[21:29:36] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/deps e3ae8e7 06linuxcnc 10src/Makefile build system: remove the unused DEP variable * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=e3ae8e7
[21:29:37] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/deps 5160825 06linuxcnc 10src/Makefile build system: explicitly generate dependency files when needed * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=5160825
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[21:30:20] <seb_kuzminsky> i'd appreciate more eyes on the seb/master/deps branch. it fixes a build problem when switching from 2.6 to master for me
[21:32:10] <jepler> seb_kuzminsky: I'd rather find a different way to solve the problem; I believe your change probably makes builds measurably slower.
[21:32:51] <jepler> seb_kuzminsky: I believe the real problem is that we have a lot of unqualified rules like this:
[21:32:54] <jepler> emc/motion/Submakefile:../include/%.h: ./emc/motion/%.h
[21:32:57] <jepler> emc/nml_intf/Submakefile:../include/%.h: ./emc/nml_intf/%.h
[21:32:57] <jepler> emc/nml_intf/Submakefile:../include/%.hh: ./emc/nml_intf/%.hh
[21:32:59] <jepler> emc/motion/Submakefile:../include/%.hh: ./emc/motion/%.hh
[21:33:16] <jepler> (before the first : is the filename where the line is, that's a grep)
[21:33:43] <jepler> those should all be corrected so that they say $(INCLUDES_THAT_CAN_BE_GENERATED_FROM_EMC_MOTION) : ../include/%.h : emc/motion/%.h
[21:34:22] <jepler> what happens is that the .d file has a dummy rule for each .h file; this induces make to choose the wrong location to copy tc.c from
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[21:34:37] <jepler> .. because there's some rule in a .d file which says emc/kinematics/tc.h can be re-made by executing no command
[21:34:58] <jepler> with your change the .d is regenerated before it considers this, and disaster is averted
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[21:58:31] <jepler> +$(patsubst ./emc/kinematics/%,../include/%,$(wildcard ./emc/kinematics/*.h)): ../include/%.h: ./emc/kinematics/%.h
[21:58:43] <jepler> if you think that's a fine line, try writing a sed script to make it
[21:58:51] <jepler> s@^\.\./include/%\.hh\?: \([^%]*\)%\.\(hh\?\)@$(patsubst \1%,../include/%,$(wildcard \1*.\2)): \0@'
[21:59:04] <jepler> ... patience ...
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[22:01:59] <jepler> nah my change didn't actually fix the error
[22:02:44] <jepler> nah I didn't actually test with my change in effect
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[22:12:13] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 19d770c 06linuxcnc 10src/Makefile build: provide empty EXTRA_DEBUG by default, but allow overriding from make commandline * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=19d770c
[22:12:13] <KGB-linuxcnc> 03Jeff Epler 05jepler/proposed-master 57b40d5 06linuxcnc 10(18 files in 18 dirs) build: fix 'cannot stat tc.h' build error when switching branches * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=57b40d5
[22:12:22] <jepler> seb_kuzminsky: I believe my proposed-master branch fixes the problem and prefer my solution (how typical is that)
[22:12:44] <skunkworks_> control freak!!! ;)
[22:13:44] <skunkworks_> into the overnight
[22:13:52] <skunkworks_> heh - wrong window
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[22:27:38] <jepler> if not it was super enigmatic
[22:28:33] <jepler> if not, it was super enigmatic
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