does anyone know if the emc disc will install on the same hard drive with windows and set up a dual boot
Martini: long story short -- it's supposed to, the steps you take at installation are the same as for standard ubuntu 6.06, but I've never done that myself.
Martini: the internet turns up lots of pages with advice & instructions, such as http://www.mattvanstone.com/2006/06/dual_booting_ubuntu_606_and_wi/
when googling for ubuntu 6.06 dual boot
I would add a extra HDD 20GB is plenty - boot to the live CD and point the install there.
then you could use either Win or Linux to config the boot loader menu
skunkworks, where's your engraver?
link on ebay I mean?
i have an extra 10 gig,may just put it on that,thats how my other computer is
hey all. with 4th axis setup, AXIS display thinks i have a rotary 4th axis, even though it's defined as 'linear' and tkemc shows and does it correctly. any help on AXIS?
Roguish: "A" is always considered rotary
ok, should i change it to U?
if you are using the CVS version of emc, you can call it "U". in 2.1, the only axis names are XYZABC.
OK, then you can't call it "U".
willl that change it to a linear axis?
can't ? no linear 4th axis?
not in the 2.1 series.
in 2.1, the only axis names are XYZABC
well i got my cabling and wiring worked out. that's the immediate goal.
working my way to a 'gantry' system.
anyway, with AXIS the A axis does move, just very slowly. switcht to tkemc and the axis spins very quickly without ANY other changes.
could this be a problem?
sounds like a bug in tkemc - A should not be linear
is this when jogging or using mdi/gcode?
well there is no real indication that it's rotary or linear. just when i do any jog moves the action is quite faster than in AXIS.
tkemc uses some weird default value for jog speed, there's a slider
it starts at "1" which is 1 inch per minute
unless you set some ini parameter
in an XYZA setup (e.g., stepper-xyza) the A axis is jogged at the speed shown on the second jog slider, in degrees/min
i copied the z axis .ini lines to the a axis 'cause i am using the same drive and motor.
anyone: what happens if you use XXYZ on the COORDINATES line?
so, if i do a cvs checkout and run-in-place will i be able to get 4 linear axes?
yes, i'm not sure that's what you want though
for example, you command g0 X1 you want two linear axes to move
yes, the "nineaxis" feature is in the CVS version. but you're talking about a gantry, not >3 independent linear axes which is what UVW is for
i'm just trying 4 linear as a precursor to the gantry. i have already been reviewing the stepper-gantry demo.
Roguish: do you need to be able to jog the two gantry axes independently?
depends upon how the homing routing works.
a manual method is to home them together, then diable one and jog the other to where ever it needs to be.
and actually the homing routine is what i want to work on. there are several philsophies.
like what... all i need is to be able to home in any axis... 1 at a time and end up all homed...before i start working steel
looking forward to a gantry style, 6 axis router.
7 motor plus the spindle.
twin x-axis drives...
roguish how do you know if the twin axes are out of square when they aren't homed? or do you just assume they are close enough when you start off?
gotta assume something. it's in the setup of the homed positions. takes a bit of effort to square it up.
the twins are a master and slave relationship...
i dont get 'gantrykins' it doesnt seem to do anything
you can set up the tweak factors quite accuratly... the toshiba mph with tosnuc 888-2 had fiber optic link.... if you ahd too much vibration it wacked..
i found out at a show... where the machines arent bolted down to begin with...
thanks for the help. time for dinner. ttfn
Roguish: here's some info on gantry stuff, and how it does homing: http://sourceforge.net/tracker/index.php?func=detail&aid=1075625&group_id=6744&atid=356744
SWP? 5I22-1m subsystem ID is 3132 (though the 31series numbers may change when PLXTec gets off their buts and gives use some new SSIDs) -- Peter (dumbass/lazy)Wallace
boy word gets around quick these days
a-l-p-h-a2 is now known as a-l-p-h-a
SWPadnos: did you see that? ^^^
* jmkasunich tries to extract foot from mouth
while you're at it, could you grab mine as well ;)
have you worked on the 5i22 loader yet
so just to be perfectly clear, the codes for the 5i22 1.5M are 10b5/9054/10b5/3131, and the codes for the 1.0M version are 10b5/9054/10b5/3131
and the codes for the 5i20 are 10b5/9030/10b5/3131
is that correct?
3132 for the 1M
crap, I thought thats what I was typing
you typoed it :)
5i22 1.5M = 10b5/9054/10b5/3131, 5i22 1.0M = 10b5/9054/10b5/3132, 5i20 = 10b5/9030/10b5/3131
that's interesting. it's PLX that issues the SSIDs?
1m = 3132 1.5m = 3131 for now, I have a request in for new numbers for the 5i22/5i23 but PLXTech is being coy
what's the 5i23?
(going to be)
like 5i20 (72 I/O) same price as 5I20 but 400K spartan3/9054 - 5V tolerant
03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: revise subsystem device ID for the 1M gate 5i22 (per Peter Wallace on IRC)
so like the 5i21 but not the RS422 thing
heh, should I add a line to the loader for the 5i23
I guess you could look at it that way, It actually was made from the 5I22 schematic with FPGA transplant
with the 9054 bridge, it will probably program more like the 5i22 as well
yess, All 9054 loaders are the same
I'm thinking of it functionally/feature-wise. the 5i21 is a 400k spartan 3, but it has the differential transceivers instead of generic I/O connectors, and it uses the 9054
so, does the 9054 generate the /INIT signal, or is that just not used the same way?
the saprtan datasheet doesn't make it look like you can program with only two pins plus data ...
Iinit is generated by the FPGA, it is of some minor use to poll but the 9054 only has 1 input bit and one output bit...
ah, no wonder :)
so INIT is not readable from the PC side?
I saw all of those unused FPGA pins, and was wondering why you didn't connect more of them to the 9054 :)
on the 5i20, /INIT going low before DONE goes high is how you detect a CRC error
guess you can't do that on the 5i22?
No, but then again if you dont get done your screwed anyway
PeterW: can you take a quick look at lines 36-70 of http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/utils/bfload.c?annotate=1.4
if you could share the corresponding info for the 5i22 it would really be helpfull
I guess the step at line 63 "wait for /INIT high, done clearing memory" can be done using a timeout instead of waiting for the pin to change
it's a 100us wait in the 5i21 loader
and CRC errors would be detected if you transfer the required number of bytes plus final clocks and don't see DONE
Most of that is on the .UCF or .PIN files in the 5I22 zip file. Ill take a look at the schematic on Monday and if anything is missing Ill get it to you
oh - I'm assuming it was OK to send jmk that hostmot2.zip you sent me (sorry for not asking first)
Yes 100 usec wait will (have to) do
what isn't in the ucf is the connections between the bridge and the FPGA (other than LAD0-31, those are obvious)
lines 40-46 of that file I kind of had to deduce (or in some cases figure out with an ohmeter)
I still don't know what GPIO2 and 6 are connected to
I think the only things that are not in the UCF file are the configuration connections, since thers no other GPIO on the 9054
I had wondered about the names GPI and GPO - I wasn't sure if those were typos for "1" and "0"
(on the 5I20 the unused GPIO is just that, unused)
with only two it won't be as hard to figure out
and they're connected to DONE and /PROGRAM
No on the 9054 you have one GPI and one GPO...
yeah - I see that now. kinda strange
Whats worse is that they are also DMARQ and DMAACK if you use the 9054s DMA controller
03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: mystery pins turned out to be unused
I saw that in the manual. it didn't make much sense to me, but I think it does now
Theres some logic on the card to disable /PROGRAM assertion when the FPGA asserts DISABLECONF - in case you want to use DMA and dont want the FPGA reset by DMAACK
I doubt we'll be using DMA
is there a way to tell that the FPGA was successfully configured?
I guess that can be used as a protection bit - if you simply assert DISABLECONF once your config is loaded, you can't load another one without powering down
SWPadnos: I think a rising edge on DONE tells the tale
We have some customer using it, getting sustained 84 MB/S transfers
ok - I wasn't sure if that was per word handshaking
Yes done high means your ok
PeterW, that's a pretty good rate
do you know the motherboard chipset? (some VIA chipsets suck for DMA, so the card/9054 may be able to go faster)
I think thats close to the limit, I think it was data transfer on 11 out of every 16 PCI clocks
well, that's pretty darned good, though unneeded here :)
thats pretty darned close to video capture rates isn't it?
faster (unless you're talking full HD) - that's bytes, not bits
500K pixels x 3 bytes per pixel times 60 frames = 800x600
except that's not how video capture is done ;)
a frame grabber would need much more data
I thought with interleave and such it would be less
more than video capture
like 30 full frames per second, not 60
(well actually it is for a sort of video capture thought thats about all I can say)
I think a frame grabber just gets progressive frames from a camera source, which could be high resolution
PeterW: you're not giving away much, very few other things stream that much data ;-)
video capture is the one that goes interlace, gets compressed to 4:2:2 etc
I bet you could build a CGA card in one of those boards ;-)
you can do CGA with a PIC :)
BTW The 5I20s throughput can be improved with a simple hardware hack (Rev G and >)
smilies are funny sometimes
the > ) became an alien face
so far nothing that we've been doing has been even close to throughput limited
Actually you can do mono VGA easily in the 5I22
I said CGA because it has digital outputs - you'd need DACs for VGA
well, if you input and output at max speed, you can get close to 60 MB/second with 4 of my analog boards on a 5i22
Resiistors are fine
but from a gate-count point of view, I don't doubt it
r-2r DAC - there are plkenty of pins
still an external board tho
each connector becomes 3x 6-or 7-bit DAC, plus HSYNC+VSYNC
for mono its just one series resistor...
I already have a triple-head video card, thank you
which package is the 9054 on the 5i22 in?
PQFP or PBGA?
so PROGRAM is driven by USERo/ aka pin 158?
Yep, its the only output bit weve got....
and DONE comes in USERi/ pin 159
I dunno why I'm putting pin numbers into the file, but they might be handy some day
hmmm jus tso Idon't have to read the whole manual, what are the M, J, and C modes?
if there's a nutshell version
Dont recall off hand, I think we only use J mode
ok. that's good to know since the pinouts change depending on mode (from what I've seen in the table of contents)
I'm looking at the pinout page - the data bus changes from LAD0 thru LAD31 (mode J) to LD0 thru LD31 (mode C) to LD31 thru LD0 (mode M)
hmmm. so no addresses in C or M, which are big-endian vs. little-endian versions of each other
BTW the reason we dont use all the pins is that on a 6 layer board we cant route them all (plus bank limitations) basically an economic decision
C and M also differ in other areas
J and C have LBE0 thru 3 (byte enables), M doesn't
PeterW, yeah - fanout can be a bitch, especially for the small BGAs
Yah no separated addresses, always muxed A-D bus
what PCB software do you use?
is there a status LED on the 5i22, or did that also get eliminated because of no GPIO to drive it?
there are INIT and DONE LEDS on the board
(Our schematic object has inner pins labled H for Hard...)
Yep just 2 lousy bits...
"in case of emergency use these pins"
what about the FPGA's WRITE/ pin
tied to /LWR as on the 5i20?
ah - table 1-2 tells what the modes are (page 1-6, 38 in the pdf)
/CS is tied to /WR
/WRITE goes to GPIO
Dont remember without the schematic, it is probably just pulled low
JMK - I can send you a schematic
PeterW: that would be appreciated
I'll only put the programming relevant signals in the source
then I'll treat the rest as top secret
(let the dog eat it)
what's this 5i22 business?
5i20 on steroids
what's this 5i20?
33% more pins, and 7.5 times as many gates in the FPGA
now wit h extra connectors!
oh, that fpga mesa board?
maddash: 5i20 us tghe secret code name for the new Nacho Cheese
JMK - OK, I'd prefer the schematic not be published, not rocket science but still
isn't that a waste of an fpga
understood - as I said, there are only a couple signals I want to understand
maddash, why would you say that?
maddash: It's damn good Nacho Cheese... gives you super powers!
PROGRAM, DONE, /CS, /WRITE, etc
maddash: Then you can be like SWPadnos
similar to the listing that I showed you earlier
SWPadnos: this mesa board's primary purpose is to function as a i/o board, right?
if you'd rather just tell me what those few signals connect to, thats fine too
Actually I should probably append those to the .PIN files anyway
PeterW: Come on... dont ya want to see the schematics at part of the background for any new logo/splash scrrens ;)
maddash, no, its major purpose is to function as anything you can fit in the FPGA, with the 72 or 96 I/O connections it has
maddash: you can put lots of stuff in the FPGA - if it was just 96 pins, you are right
but how about step generators, serial ports, encoder counters, PWM generators, etc?
PeterW: (kidding of course)
don't forget expensive analog I/O from a little company in Vermont :)
SWPadnos: so it's like one of those altera boards from fpga4fun, except with shitloads more i/o (and more freedom)?
SWPadnos: the fpga is reprogrammable?
the pluto is something like 20K gates
SWPadnos: Expensive yes, but support sucks... those guys are more arrogant than me!!!
and it's actually designed by an engineer for industry, not by a hobbyist for hobbyists ...
the 5i20 is 200K, and the 5i22 is 1500K
* maddash orgasm
also, the pluto is crippled by using the parport
and a side bonus - the xilinx tools run natively on Linux
the 5i20 does 32 bit PCI transfers
and the 5i22?
oh, and as soon as someone gets off their butt, there will be a Mesa parallel port / USB unit as well :)
the 5i22 does 32-bit transfers as well
or better! :)
wow - only tice the price for 7.5x the number of gates!
PeterW: I just want to see this as part of the firmware for the next product http://www.faqs.org/rfcs/rfc2324.html
Jymmm learn VHDL and program it yourself
holy crap, why bother with the TP at all, then? or emc, for that matter? just port over the tp code and leave usr_intf in
or verilog if you like
jmkasunich No way! I want plug n pour!!!
with that many gates, it'd be a breeze to implement a floating point trajectory planner
heh - breeze, no. possible, possibly :)
jmkasunichI dont think the FDA would approve of direct IV drip
read the RFC he linked
"RFC 2324 - Hyper Text Coffee Pot Control Protocol (HTCPCP/1.0)"
rofl error 418 is the best
holy crap, this guy is serious about coffee pot control
1 April, 1998
and don't forget the carrier pigeon protocol
Yeah, one more year to actually implement it on it's 10th year anniversary
I guess the real question about error 418 would be, why would you implement HTCPCP on a teapot?
That woke up an really old neuron - from Reboot: I'm a little teapot shout and stout - this is my input and this is my out...
some neurons are better left dormant
swpadnos: you can get 1.5M gates from http://www.enterpoint.co.uk/moelbryn/raggedstone1.html
no PCI bridge
and shit for I/O connections
"Large number of user I/O available"
so you're paying $200+ extra for "non-shit" i/o?
dunno what that means
and they're 140 UKP, which is over $280 now (unless you're astudent, which I'm not)
and what kind of fpga does this 5i22 use? I'd read the manual, but my xpdf keeps dying when I flip to the TOC
maddash: the 5i2x boards have 50 pin ribbon connectors using standard opto-22 industrial I/O pinout
with interleaved ground
SWPadnos: it's $211. switch over to pricing in dollars (middle at the right)
no, the raggedstone1-1500 is $280.00, $329 including VAT
look at the store
jmkasunich: "50 pin ribbon ..." == the black brackets with pins on the board?
on the mesa board, yes
two rows of pins
those single row connectors on the ragged board are not rugged at all
SWPadnos: meh. I'm a student. ignore me.
the $120 one is 400k gates
also, they do the PCI bridge function inside the FPGA
dunno how many gates that uses up
ah, spartan 3 fpga.
that's an interesting board, but there's a very big difference between things meant for people to play with and things meant for people to use
Weve considered doing a low cost bridgeless card, But they are something of a pain if you misprogram them, they require dual config memory (or newer spartan with selectable SPI memory offset)
jmkasunich: pci core lives outside the mesa fpga?
yes, there is a PLX9030 (on the 5i20) or PLX 9054 (5i22) bridge chip that handles all the PCI stuff
Also require bus switches on PCI bus for 5V PCI tolerance
the raggedstone board has a row of 5 bufferish looking chips between the PCI connector and the FPGA
guessing thats what they are
so what do you folks use the 1.5M gates for?
dunno yet :)
on the Mesa, I mean
so far EMC only supports the 5i20 - 200K gate version
we're working on support for the 5i22
I'll be using some of them for generic I/O, and two interfaces to a 6-ADC + 8 DAC board I designed
I may also throw in slew rate limiting on the DAC and averaging on the ADC if I have time
just noticed another "feature" of the raggedstone board
you can't always program it from the PCI bus
how do you know that?
need a PCI core to enable access, and need access to load the PCI core
reading the FAQ
they normally program it with a JTAG cable
then skip straight to "MOTHERBOARD BOOT FREEZES WITH RS1 FITTED"
it's a demo board that also has a PCI connector, not a PCI development board
it's like adding an SPI connector, only more pins
so mesa solves this by using an external pci controller. which always works?
btw, raggedstone will sell you the netlist for their PCI core, for 500 to 3000 british pounds
wow, I almost went ahead to buy the raggedstone.
no open source here
maybe I could get a cheap dsp board and hook it up with 5i20 -- fpga generates the output signals to my CNC, while the DSP calculates the trajectory.
if you want to do FPGA on the really cheap, get a pluto
20K gates or so, and 15-20 I/O or so, for about $70
plugs into the parport
or wait for the 7i43, which will be ~$10 more, with 200k gates I think
if you want to do FPGA stuff a little better, get a 5i20
5i22 is for people who need LOTS of gates
the pluto is cheap, no doubt, but what can you do with it besides step generation and basic i/o?
whatever you can fit into the gates
I think the first application was actually PWM + encoder for 3 or 4 servos, not step generators
and if you want, you can stick in one PWM and 2 step generators
isn't PWM for servos only? and aren't step generators for steppers only? or has the world grown larger while I've been away?
thats pretty much correct
mixing and matching is for oddball requirements
three axis servo machine with a stepper running a tool turret, for example
so why would you mix PWM with step generators? is there some benefit to using servos and steppers simultaneously?
step+dir can be used for servos with drives such as geckos and rutexes (and many others)
well, if you have 2 steppers and an analog servo amp, yes
oh, ok. I thought that this was some cool thing I didn't know know
even with steppers, you may want one PWM for spindle speed control
you can use a servo to control a spindle?
you can use an analog output to control some spindles
PWM output is basically a slow DAC
(if used that way)
THIS IS SO COOL!
* maddash goes back to porting emc's motion module to some embedded processor or gargantuan fpga.
or as apple would say, have iFun
PeterW: still here? http://www.pastebin.ca/687998
ifun costs $200 less than it did two months ago.
the first part is the existing 5i20 notes, the 2nd part is my best guess at the 5i22
Rats, forgot to tell the dog to eat, wont eat if not told...
if you can confirm/correct that, I don't need the schematic
a dog that won't eat?
as long as he doesn't eat the rabbits
thats a strange dog
usually you have to use a stick to stop them from eating
only if the dog is actually a bitch.
* maddash hides.
sorry, couldn't hold it in
oh, dear -- silence.
late - working on other things ...
Hes afraid of the rabbits, especially if they thump
he should be afraid of those rabbits - they intend to take over the world
starting with the dogs I bet
JMK looks right, I'll confirm on Monday
yes - thanks (both of you)
SWPadnos: you want to take a shot at the actual programming function? copy the 5i20 one, replace the init/ check with a 100uS timeout, and tweak some stuff
yep. I can do that
the size of the data is embedded in the bitfile - ch->len
Yes the 5I22 programming is basically the same, just I/O bit/base address changes
lemme commit what I just pastebined
I just need to come up with a small FPGA config that does the blinkenlight thing on all the connectors
SWPadnos: like a POST ?
maybe now that my sewer work is almost done I can get back to the driver stuff
if the glove don't fit, you must commit
been holding it too long? :)
yeah. there's a whole choir singing that phrase in my head
jmkasunichsewer or septic?
You can use IOPR24, but you wouod have to blink the lights yourself (it does blink the LEDS)
SWPadnos: you bought the 5i22?
ok. unfortunately I can't see the board-mounted LEDs - they're (a) inside the case and (b) on the underside of the board
he bought several of them
maddash, I have 5 of them, yes
hmmm. I may be able to peek beyond the cable
he must be awfully rich.
Well connect an LED or 7I31 to a cable...
he's got a job for them
I have a 7i31 on a cable :)
03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: documented 5i22 config related signals
I managed to get work to buy me a 5i20 for doing some drive work
that requires software, which takes a little longer to verify operation, and doesn't tell me if the software isn't working :)
it will be interesting to see how it holds up in a high noise environment
all you need is 72 filter caps
SWPadnos: a job? mass panic? terrorism? world domination? those are the only things that 7.5M gates are fit to do.
the 5 boards are for 5 units
so it's only 1.5M gates per unit
I'll be back
maddash: No, just 4 player PONH
and I could probably use the 5i20 for it, but this job isn't cash-strapped, so I didn't want to screw myself by getting the least cost unit
Jymmm: sewer http://jmkasunich.dyndns.org/cgi-bin/blosxom/index.html
SWPadnos: so you get paid to play with FPGAs?
he gets paid to make things work
FPGAs are just a means to an end
FPGAs are a means to world domination!!!!!!!!!!!11111111
um - methinks maddash has been watching Hudson Hawk a bit too much
I thought that was rabbits
or are FPGAs the tools that rabbits will use to dominate the world?
frickin' rabbits with frickin' fpgas stuck up their ___
fpga are a way to make things without actually having to make things.. at least that is what my intoxicated mind is understanding.
jmkasunich How long have you been w/o sewer?
completely without, less than a day
Ok, not too bad, I guess
there has been a broken pipe under the porch for at least a couple months, and it was running slow
jmkasunichHope you ran that exxtra line for the shower in the new area that you
'll get to in 10 years
you got half the place dug up, one more pipe aint gonna hurt
jmkasunich: how did this (http://willepadnos.net/jmkasunich/airguard-spin-flat-0522.jpg)
not sure what you are talking about?
maddash: he recovered easily - they do that on purpose all the time
the "not sure" was to Jymm
jmkasunich: oh, so it wasn't unexpected?
nope - I think they call it a hammer-head stall
jmkasunich You know, you've always wanted to have a sink/toilet/shower [insert some areas of your property here] but there was no sewer line close enough to do it.
straight up, stall, tip over, and eventually dive out of it
strangly, I never wanted a shower in the front yard
Like turn part of a garage into a an apartment, or game room, etc
no, but a toilet there could be useful
the garage is detached and 50+ feet the other direction
jmkasunich pvc pipe is cheap
there _was_ a basement bathroom, but I'd rather have basement space for tools and machinery - there's a bathroom at the top of the steps
Jymmm digging trenches isn't
jmkasunichfront of any home depot
Pedro, Jesus, Jose, Manual
Jymmm: "detached garage"
you do know what that means? it means water freezes in there in the winter
PeterW, the sample 5i22 configs are made for the 1M FPGA - any suggestions on getting them into the 1.5M version (other than procesing the source vhdl with the new target)?
jmkasunich I thought that x number of feet below ground level it wouldn't freeze.
I knew I forgot something... I can send you one on Monday, Its all on work computer, I can copy it here and compile it on the laptop but its kind of a pain..
ypu could also compile the IOPR24 demo, that should be hitchless
ok. I'll start with that, and if I get stuck, I'll do other things until you get the 1.5M demos done :)
Actually theres a IOPR24 config in the distribution zipfile
The SPI demo was 1M because thats what I happened to test it on
yep - I saw that
I only saw two versions of the IOPR24, one for the proto boards and one for production
They are both 1.5M configs, we haven't shipped any 1M yet You can tell by the uncompressed config file size 1M is about 393k 1.5 M is bigger
Q? What would EMC like to see as the hardware side of a UART? I've go my UARTs working, Weve got some new Amps that have serial interface
ok - the IOPR24.BIT file is for the 1.5M part - cool
PeterW: regarding UARTs, I really don't know - that isn't something that really lends itself to a HAL driver
(its not a "signal" like a DAC, ADC, encoder position, step rate, etc)
it depends on how the data is used at the other end
There is some protocol involved, but thats basically a fixed header, data and a checksum. For a 3phase amp its just a single 32 bit word write
any readback (like position or velocity?)
(to our 32 interface UART)
oh, you are talking about a UART that is connected to a specific device on the other end
The amp used alone has no knowledge of position, and just echos status. position is up to other FPGA pins, if you add our PVT module, it can echo position but normally just ack or nak
Actually the UART is generic, Though in current incarnation only 8 bit 1 start 1 stop mode
thanks for the info PeterW
does the UART take a 32-bit word and do 4 byte writes?
Well goodnight anyway
or 3 or 2 or one, depending on write address
if I knew what it would be connected to, and I also knew that the UART firmware would do all handshaking needed, then I can see it being useful in a HAL context
Same thing on read, pops 1,2,3, or 4 bytes depending on read address
so the servo amp that takes a 32-bit instruction word - HAL can write that word and move on
actually, what would be really great would be a modbus port :)
just load up an array of modbus variables, with all the protocol support in the FPGA
right, Also have a global hold register (transmit buffers are 64 bytes) so all channels can be written, and the released at onece
ok, that's cool
baud rates limited by cable lenght, I imagine
Modbus is a might bit more challenging
that's why I'd want it in hardware :)
or a microcontroller in the FPGA - maybe stick an AVR core in there or something
We expect to use either 5Mb/s or 3.8432 Mb/sec,Cat5 cable
resume. fudging, blurring, distorting, lying. oops.
Usually better space wise to use a FPGA tailored processor (say PicoBlaze)
sure - that works
Just saw someone managing Gig Ethernet in Virtex with Picoblaze per channel. Probably 40 or so would fit in SP3-1.5M
(picoblaze that is)
wow. I'm surprised the picoblaze can run that fast
though I'm sure the Virtex helps there
Not sure how fast it runs in Virtex but at least 100 mhZ
is picoblaze equivalent to, say, avr?
I think my H key is screwed - I heep typing Mz instead of MHz
Simpler but tiny
SWPadnos: then how would you ask for h-h-h-h-help?
maddash, close enough - it's a small micro designed by Xilinx for their FPGAs
I type it like a brit - 'elp!
SWPadnos: Te ell you would!
yea, well sit man. I'da tougt you'd elp me out ere, but I guess you're a sitead
SWPadnos: sut up you wore!
come ere and say tat!
omg, what have I created?
it's your fault
don't just say o to me young man. not if you want to reac tirty
maddas: that'll teac you to open you're big mout!
Jymmm: "that'll"? ypocrite.
like president Bus!
Sigh.... 7" TV buy it now for $64, shippping $50
Jymmm: low on cash?
maddash: no, why?
maddash: the cost of shipping is almost as much as the product
maddash: avr processing speed is mostly limited by the flash program memory
hmmm. how would you come to that conclusion?
i just heard it somewhere
someone was talking about overclocking z80's i think
apple, meet orange
and i was wondering how such an old chip could do 200MHz
holy crap. newegg has a special where you buy a power supply (900W, so it's not cheap), and get a 250G hard drive free O_O
did they have to cool it with liquid nitrogen?
the Z80 kind of sucked for clocks/operation. there were no instructions that took less than 2 clocks, and anything that used more than one register or used a constant + a register was 4 or more IIRC
[04:34:25] <fenn> http://en.wikipedia.org/wiki/Zilog_eZ80
oh - the eZ80 isn't the same as the Z80
and they're not saying they've clocked a Z80 at 200 MHz, just that the new chip is the equivalemt of a Z80 at 180/200 MHz
Nov 17 17:08:34 Lars_G Z80 at 250? O.O
Nov 17 17:08:42 Lars_G right. cooled in liquid nitrogen, right?
[04:36:43] <fenn> http://ghutchis.googlepages.com/tv80homepage
wrhee cna I pirtea a fpga cihp?
Most decent FPGA CPUs are 1 clock/instruction, Though I think the PicoBlaze2 is 2 (haven't messed with PicoBlaze2 just PicoBlaze1)
I can check it out. I think I have picoblaze, TSK-51 and TSK-3000 available to me
and probably microblaze as well
(then there are the NIOS and NIOS-2 for Altera)
anyway, why are you folks bothering with processors? aren't fpgas capable of executing everything combinatorial-ly? ie, all at once?
Microblaze is pretty nice though not free
Ranque-Hilsch air seperator been wanting to make one of these for shrink fit items.
[04:40:13] <skinnypuppy1334> http://en.wikipedia.org/wiki/Vortex_tube
I've got the Xilinx and Altera tools, with *blaze and NIOS licenses
then there's Altium, with the licenses for various other CPUs
taht is cool
I think Lattice's Mico32 is GPL, not sure how big it ends up in Xilinx
hmmm. I think I have the lattice tools as well, come to think of it :)
oh - no software, just 3 of therir dev kits
maddash - Got to do some thing sequentially so things _dont_ all happen at once :-)
I think LabView FPGA uses about half the gates for serialization
they even have a fancy name for it - it's the "enable chain
i like the idea of putting a processor on the same chip, with connections to the fpga
I really wanted to have that - the Atmel FPSlic is an AVR with 5k-40k gates around it
Some Virtex models have embedded PPC
but it was always very expensive
yep - Excalibur from Altera as well I think
is there any good reason its expensive?
I think it just never got too popular
Tell me about it (deisgning in Virtex 5 for PCIe card)
no other good reasons I know of
chicken/egg is a lame business strategy
they may have had process issues with it - most FPGAs are done on very low voltage processes these days, but microcontrollers use 3-5V internally
That reminds me, gotta close chicken coop...
hmm, most avr's run on 1.8V supply these days
or maybe it was 2.2
PeterW: Reaccon,s ye we believe you... we know the chickens are really your product staff stuffing componets!
they can, but the spec is generally 2.something -5.5V
and FPGAs nowadays run off <1 to 1.8V internally, and have "3.3V-tolerant" I/O
Even the PICs (yes they are horrible) we are using are 2.5V or maybe 1.8V core
3.3V tolerant? like, they will blow up if you feed them 5v and put out 1.8V signal?
yeah - I'm just not sure if Atmel had trouble with the FPSLIC that prevented cost reduction, or if it never got popular enough to go down in price
fenn, yes, the IOs will smoke on some FPGAs if you put 5V on them
They would probablly eat the SMT parts, good grit....
PeterW: heh =)
the eggs would be extra yellow from the lead
PeterW: with RoSH, no change of metal poising
We are slowly getting out of the lead business
if you dont mind antimony
I like cadmium
Solder is tin/copper/silver
PeterW: then use an oscillator
"I've got the Xilinx and Altera tools, with *blaze and NIOS licenses" <--- mr. moneybags.
Dont like your tone...
I've been collecting for ~5 years
SWPadnos: what's nios, anyway?
they have very good trade show discounts
SnSb5, tin with 5% of antimony, is the US plumbing industry standard. Yay US!
it's the Altera embedded processor, 8 to 32 bits, etc
PeterW: from before: "maddash - Got to do some thing sequentially so things _dont_ all happen at once :-)
you still need a clock - FPGAs aren't combinatorial
CPLDs may be, I don't know
oh geez, did I scare him off?
PALs and GALs are
pals? gals? I need 'em both.
more of the latter, preferably.
whichever yoiu prefer
SWPadnos: it's been my dream these past months to play with a large scale FPGA
well, if you can get to an Embedded Systems Conference or similar, you can probably pick up a development kit for $500 or so
i dont think you even need something so fancy
most are programmable by jtag
can build that out of junk lying around :P
its the software that's the killer though
including board, some nice FPGA on it, sometimes with various interfaces like ethernet and LCDs, plus the licensed software (time limited to a year usually)
FPGAs can be just combinatorial...
don't you still needa clock (for any LUT-based ones anyway)?
No, after config you dont
ok. you can bypass the output FFs for the LUTs?
FF on LUT output is optional
Didi you get your loader to work?
I've been chatting instead of working :)
Well, get to work :-)
toast: hacked through any Pentagon networks yet?
how the fek do I add page numbers in openoffice? geezus.
if by "hacked through" you mean "visited their webpage once in like 2003"
PeterW is now known as PeterDumbassW
i'm not even sure what is going on here
but it is mysterious
ettercap. wireshark. arping. credit card numbers. porno. female roommate. et al.
seriously, my school doesn't provide encryption for the wireless APs they give us
so it should be possible to sniff out and view all the data sent by anyone
yay, done with CV. time for House!
that's why i always tunnel home
toast: i'm homeless. :(
i can't control the internet, but i can control my point of exit
are you so homeless
you cannot hijack someone's home PC
i forget who did that
dude lived with his laptop in abandoned buildings
nobody could find him because he was homeless
it was very ghost in the shell
just leave some bait on the door step
he didn't travel with his laptop either
he left it at the buildings until he was going to move
how'd he get electricity? food?
i read about it like, years ago
i don't remember
he may have been a professional hacker
he was homeless by choice
that much i remember
maddash: he hacked/stole/leeched it
i wonder if you could rootkit somebody's pc and install GFS on cygwin
and just use a massive botnet as a storage array
I didn't know girls needed cygwin
it's a clustering filesystem
for networked drives
i don't think it requires every node to be up
what if one of the PCs weren't connected?
i think it's got mirroring
neat. like skynet.
set at various levels
so you'd just have to figure out the average percentage of uptime on the botnet
and set the filesystem to that
Wasn't there like one REAL website that reviewed cellphones w/o all the bullshit?
kinda like cdfreaks but for cellphones
maddash: no kybd
Jymmm: touchscreen, baby. multitouchscreen.
maddash: buttons, REAL buttons
maddash: why not?
buttons accelerate the onset of carpal tunnel syndrome
bring it on baby!
virtual kybd brings on the urge to chuck the SOB and have to buy another one.
geez, I just had a brilliant idea -- i'll reprogram my wrt54g to attack the neighbor's WPA-PSK while I'm asleep!
Jymmm: no eyes?
shouldn't you use something with a little more horsepower
than a wrt54g
to do any cracking
i dunno, a computer
of the desktop, laptop, or rack-mount variety
i'm keen on saving energy. call me a treehugger.
toast: not really needed,
you're just going to let the wrt chug along until it finishes?
toast: there's a pkg available for wrt54g that does it already
i'm not saying you can't do it
it's not that hard to do
toast: hm, you're right -- it could take forever.
on the other hand, the wrt probably has a farther transmit range than my laptop
so it's a matter of distance vs. years
cantenna for your laptop?
or you could just log the traffic
is that possible?
on the wrt
and offload it somewhere else
then go back to the wrt
hm, maybe I could open up the laptop and attach a cantenna to existing antennas
"cantenna" sounds funny
reminds me of "canteen"
and han solo
holy crap, my brother's supposed to come back from camp today
nice broken windshield with all those GPses
oh - those are wires, not cracks
ok, that's it. time for bed. good night
i have a problem with emc mailing list, my mails are rejected. I'm a meber of this mailing list, but i set the setting so that i don't receive mails (i read the list at sourceforge). Why is that?
where is scripts/realtime on a proper install ?
I've only used it with run-in-place...
awallin_emc, I think you do sudo /etc/init.d/realtime start
ok, let's try that
insmod: error inserting '/usr/realtime-2.6.15-magma/modules/rtai_hal.ko': -1 File exists
does that mean realtime is already running?
look at dmesg output
nothing bad there it seems
there should be some error message from RTAI
the "file exists" message is because basically every error returns -1, which is "file exists"
hm, an old pyvcp xml file that worked previously doesn't want to work with 2.1.7
anyone know how recent the pyvcp and pvcpparse are in 2.1.7??
damn all these versions ... :)
err - nope
well, someone does, but it's not me :)
guess I need to get TRUNK and compile...
E: Build-Depends dependency for emc2 cannot be satisfied because the package lyx-qt cannot be found
I did that, then:
E: Could not open file /var/lib/apt/lists/au.archive.ubuntu.com_ubuntu_dists_dapper_universe_source_Sources - open (2 No such file or directory)
damfino about that one
maybe apt-get update?
oh, of course you have to update after changing repositories
is au for australia?
I bleieve so
It always defaults to au, and I'm in Finland... strange
are any of the 242 updates Ubuntu suggests for a new 6.06lts installed from cd really useful?
was there a ./configure option for no documentation?
I think that default is no documentation
there is an option as --enable-build-documentation
now running make.
'lo, anyone here?
I seem to be having some issues.... ;)
when doing the RT test I get a max latency of 24uS or thereabouts, so I've set my base period to 30uS. However when starting EMC I always get a "unexpected realtime delay, check dmesg". in dmesg the clocks were around 1000000, within 4000 clocks, and with an analamous clock of 1250000
this is the latest from-apt version
how is the realtime test run? I could try it over here too
don't know what your issue is...
yay, now with TRUNK my pyvcp panel works
let's hope the DACs work too...
the realtime test is scripts/latency-test
thanks swp, will try it later, I don't want to tear down HAL now that it seems to work...
halcmd save :)
good morning folks
how goes the loader?
I actually did work on it a little bit last night :)
too much IRC though
anything I can do?
not at the moment. I'm going to grab another coffee and finish it up
unless you want to write an AD7656 or AD5764 interface module ;)
I should focus on the infrastructure stuff again, before I lose my momentum
speaking of lost momentum, I should work on stepconf...
lewin1 is now known as lewing
latest pyvcp work: http://www.anderswallin.net/2007/09/pyvcp-m5i20-hostmot-4-test-panel/
gotta go, bbl
you need to stir up something
Nah. You're turn.
I'm fresh out of ideas
Hey take a picture of the front top of your Mazak and send it to me.
I can try ... it is pretty much a dark hole
It would be toward the front from the tool release cylinder
I can point you toward what we need to see if you get me a first one.
it is all one casting ... for the tool release cylinder and oriennd
I'll give it a try.
Right. But there might be two large holes.
I should do some rewiring so the front swings out easier.
The back one is the spindle stuff
The front one should be the orient stuff.
I'll get you a pic or two and we can work from there.
Hi, I'm looking for the latest gdepth module, which does not seem to be in the emc2.1.7 source download. Is there anything newer than version 0.2?
Swinging that electrical panel out of the way would make that picture easier.
Noobie1000: gdepth is not a part of emc; if 0.2 is the last release you see on my emc blog (http://axis.unpy.net)
then it's the latest there is
What's a gdepth module?
my thoughts exactly
might learn something here ;-)
[17:28:52] <jepler> http://axis.unpy.net/01169521961
a gcode "remaining material" previewer
[17:29:13] <jepler> http://axis.unpy.net/01169689661
Thanks jepler. With that version, I get a "0.5:0: File not open". Is there a python debugger I can use to see whats going on?
Noobie1000: first guess is that you are not specifying arguments properly -- it thinks you're using a file named "0.5" which could not be opened
make sure that when you use -x, -y and -z to specify initial material that you quote the values: -x "-1 1" instead of -x -1 1
jepler ... looks like a pretty good emulation of the cut to me
Thanks jepler. Exactly my mistake...
jepler... now the file is being processed for a while and I get "NameError: global name 'glMaterialfv' is not defined". Any suggestions? (I am using the emc-environment, so my python modules should be resolved ).
I'm gonna bail and go take a pic or two. See Ya.
Noobie1000: not sure -- 'glMaterialfv' should come from minigl, and is present in all emc 2.1.x releases and in the CVS development versions as well..
jepler, even with the error, I did get a png :-). I only see a part of it (I am probably giving wrong dims for the material), but its very exciting. Thanks for a very cool feature.
Noobie1000: python -c 'import minigl; print minigl.__file__' to see if the minigl interface module is coming from a surprising location
if you are using a self-built run-in-place version it should come from inside that directory .. on my system, for instance, it comes from /home/jepler/emc2.head/lib/python/minigl.so
I get: /usr/lib/python2.4/site-packages/minigl.so
is there a file 'minigl.so' in your self-built version?
what version is the installed version?
I have a ~/emc2.1.7./lib/python/minigl.so
jepler, I guess there are conflicts between my self built version and the ubuntu emc2 packages
% echo $PYTHONPATH
emc-environment should set PYTHONPATH in a way that makes the stuff in the self-built version take precedence over the installed version
That one is good: /home/hugo/emc2.1.7/lib/python
but in the same shell, python -c 'import minigl; print minigl.__file__' says that it took the version in /usr/lib/python2.4/site-packages instead?
I'll uninstall my ubuntu packages and try to sort out my paths. Thanks for the tips and keep up the good work
that should be unnecessary
boy, glade sure is tedious to use
jepler. Thanks again. I got it working :-) (I was using 2 terminals, only one which had the proper env).
SWPadnos:u in here
more or less
got my 203v drives installed last nite
gotta mount my pacsi steppers for x any y,then will be ready to try the encoder setup next weekend
how much trouble is it gonna be to set up 2 parports?
should be easy
will emc detect the 2nd port
sometimes you have to experiment with which address to use (for PCI parports)
once its set in bios
emc doesn't detect anything - you have to set it up yourself
if it's at a standard I/O address (unlikely if it's PCI), then the parport driver may see it automatically
wont the ports be 378 and 278
I'm not sure if it still does this, but it used to scan the normal ports (378, 278, 3bc)
no, not for a PCI card
at least, probably not
consult the wiki, I believe there's a page with aprport configuration notes
you can find the address with lspci -v
how many times per sec will i be able to read these encoders,is there a formula
yes, there's a formula. consult the wiki ;)
the wiki search is a very useful tool
the emc knowledge base?
k,thats where google took me
hmmm. software encoder stuff may not be there
I think it's in the user manual though
k,didnt see it there
basically, the BASE_PERIOD determines how fast you can count. you should allow for two BASE_PERIODS per encoder count
so if you have a BASE_PERIOD of 20000, that means there are 50000 interrupts/second, and you can count up to 25000 counts /second reliably
my base period is 10000
oh, that's fast
so you can count 50000 pulses per second
that's per axis, they're counted in parallel (more or less)
note that you'll probably have to slow down the base thread when you add a parport, unless you add a dual PCI parport card and use only the PCI ports
heh - shouldn't have saved that $5, eh? :)
or get a faster computer
no, a faster computer won't help at all
it'll just sti and spin faster
was gonna use onboard port and a pci
i can get the dual port card if it would be better
dont wanna have a bottleneck
it's likely to allow for faster base thread execution
[18:32:25] <Martini> http://www.gigaparts.com/store.php?action=profile&sku=HC0023
thats what i can get local
would that be good?
its a dual pci card,but only uses 1 pci slot,2nd por attaches with a ribbon cable
I thought if the encoders quadture output was symetrical - you should be able to approch one tranistion per base_period
sure - I just don't know how well that particular card will work
counting that is
skunkworks, sure, you acn approach it, but it's best to have some margin
hence "this is how fast you can reliably count" :)
right - but 20% would be better than 50%
any state has to persist at least (period+jitter) to guarantee there will be a sample during that state
it may be period + 2*jitter
though the low or negative jitter numbers aren't real - they're an artifact of the previous cycle being late
25000 is the magic number im shooting for,will never run the machine any faster than that
would be 150 ipm
looks like that is possible even with a slower base period
that dual port pci card uses mos 9815 parport controller chip, works with linux . mfctr is http://www.icintracom.com/america/parallel-card-p-6614.html?osCsid=d276c26d6ef97002db07f5d8e322135d
thanks,im gonna pick that up
on the m5i20 enable signal. yesterday we saw that the Xenable was tied to 2 hal pins, m5i20.0.dac-00.enable, and m5i20.0.out-08 ( eg for axis 0 ).
that made sense to send 1 enable to the pwm2analog of the m7i33 and another to the amplifier...
except the 7i33 has an input ENA and an output ENA which confuses the need for the 2 hals pins. thoughts?
SWPadnos:thanks for pointing out that bottleneck
tomp2: I'm not at all sure of the details
I think that dac-00.enable is not going to the 7i33 - it goes only to the PWM generator inside the FPGA
and out-08 goes to a pin that is accessible to the user, to enable the amp
JMK is your sewer issues resolved?
skullworks-PGAB everything except inspection, filling the trenches, and cleanup
[18:55:25] <jmkasunich> http://jmkasunich.dyndns.org/cgi-bin/blosxom/index.html
They wanted to tear mine all up too - put a dual cleanup pipe inline.
would have required removing the front proach slab
just tunnel under it ;-)
clean out pipes would have come up thru it 2 feet to the left of the front door!
I think 'dac-00.enable' does go to the 7i33 becuz ...
Hal-integrator 188.8.131.52 show P2pin23 dac-00-enable ouput
and P2 is connected by a flatband to 7i33 for anyone using m5i20 and 7i33
That same pin (P2p23) is linksp'd to Xenable in m5i20_io.hal
and P4p33 (m5i20.0.out-08) is also linksp'd to Xenable in m5i20_io.hal
The 7i33 is already connected to the Xenable this way, and it has an output on 'servo -amp connector' P2 pin 13 called ENA0.
It seems the m5i20.0.out-08 connection isnt needed
( took a while to get the ducks lined up )
03swpadnos 07TRUNK * 10emc2/src/hal/utils/bfload.c: Add initial support for programming PLX9054-based Mesa cards (5i22-1 and 5i22-1.5)
[19:27:48] <tomp2> http://www.drawblog.com/images/20070909122132177.jpg
[19:40:49] <tomp2> http://imagebin.org/10338
have you confirmed that dac-00-enable actually comes out the ribbon cable to the 7i33?
duh, I guess so, you have the P2pin23 there
it seems like the out-08 is redundant isn't it?
agreed, np, just checking myself
could use a bit of hal-foo to allow the pwm w/o enabling amp ( for tests )
thanks ( got another 4 outputs :)
I haven't stared at the 7i33 long enough to know if the dac enable would be good to enable the amps.
but it appears that the 7i37 outputs are a lot more robust
I was just about to work on that when I realized that i put no power switch on my computer on the mill ;)
from the 7i33 pdf...
Each 7I33 channel has an 5V CMOS active high enable output available on the
SERVO AMP / ENCODER connector. These signals are the logical inversion of the
i can post an openoffice spreadsheet of the wiring m5i20 - 7133 - yaskawaSGDA-04 if i knew how ;) ( work in progress )
i tagged the ss onto end this wiki page http://wiki.linuxcnc.org/cgi-bin/emcinfo.pl?M5i20_Halvcp_Test_Panel
tomp2:did you make that Halvcp test panel?
awallin? anonimasu? maybe dallur?
no, I didnt
may have a m5120 project coming up soon,looks handy
i can make screens for mach,but way too green in linux to do anything
anders has made a newer test panel for the 5i20, using pyvcp (instead of the deprecated vcp that the first panel uses)
[20:43:41] <jmkasunich> http://www.anderswallin.net/2007/09/pyvcp-m5i20-hostmot-4-test-panel/
nice! i do need to separate the enables, so i can see the analog out w/o enabling the amps, thanks awallin
( doj! or just not connect the wire, or pull the fuse or ... )
'connector1' is 2nd connector P3, 'connector2' is 3rd connector P4, the 1st connector (P1) is implied in the encoder feedback, enables, and dac output
the "IO on connector" wasnt as obvious as I need ( no 2x4 attached )
the first connector is P2 :)
the JTAG connector is P1
yes, "the 1st connector (P2)"
Guest269 is now known as skunkworks_
tomp, does your spreadsheet enable your drives?
i think so, looking now
btw: re: m5i20 analog output , 7i33 manual sez load >= 5k ohm, yaskawa SGDA is 30K input impedence
are you sure yaskawa enable isn't 12-24v input?
workin that out right now, finding the 0(5v),SG ,G-COM relations
do you have a link to your manual?
i hope i can trgr the opto even tho the opto is 24V supply ;)
[21:38:30] <tomp2> http://www.yaskawa.com/site/dmservo.nsf/link2/MNEN-5CLKGN/$file/TSE-S800-15C.pdf
I've always thought that the electrocraft/AB drives may be rebadged yaskawa
maybe now - the old stuff isn't
I'm not so sure now after looking at the pinouts
is there a reason why using a potential meter + a high rez ADC won't work as an encoder?
that's what RC servos use
a potentiometer mounted on a dc motor shaft is a 'servo' ( in rc motor speek ), yes it can be 'like' an encoder. precision is based on how prefect the pot is ( if 1 degree is exactly twice 0.5 degrees etc )
and you only get one turn usually
high resolution ADCs are very slow or very expensive (or both)
hey all. compiling the trunk and received "configure: error: Required OpenGL header missing. "
SWPadnos: not if the mfg samples them
Roguish: did you apt-get emc-dev?
ds2, true, though the expensive ones somehow seem to be out of sample stock all the time ;)
probably not. will now.
so other then quality and expensive of a dac, a pot would work fine for machine encoder?
rc servo use pwm, so might not need ADC
for a few days, sure
SWPadnos: I suspect a 10bit ADC is cheaper then 1024 line encoder
few days? Hmmm
but a 10 bit ADC + a pot that's meant to be rotated 1 million times is likely more than an encoder
unless you use a "non-contact" pot :P
yep - an analog optical system would work well
that's what's used in some guitar pedals
but then that boils down to making a optical film w/sufficient resolution
fenn: synaptic says it's emc-dev is there.
ds2: you can make your own encoders ya know
fenn: I can do everything except make a high enough resolution optical film
laser printers are high enough resolution if you use a large enough disk size
well, a standard 600 dpi laser printer seems high enough to me
for a quadrature encoder, not an optical pot
don't I need 2 dots per line so that limits me to a 300count encoder or am I missing something?
oh, if you want to make a linear encoder,sure
no, for rotary
if you have 300 lines per inch (from 600 dpi resolution) then you need a circumference of 1024/300 inches
ah like that
so approximately a 2 inch disc
1 inch - pi*d
i like fudge :)
think a 600dpi inkjet on transparancy paper will work?
inkjets don't have very good black density
ink doesnt soak into plastic either
heh - there is that
apparently pcb boards are transparent to IR, and you can use the copper traces as encoder lines
unless they put that green stuff on them
there are proto services that will do it w/o the soldermask
but if you go that far you might as well just buy an encoder disc
* alex_joni is finally home
oh good. you wouldn't want to spend too long vacationing in France after all :P
fenn: I can probally make 6 disc for < $50
using PCB proto services
you can buy discs for ~11 from us digital
or less on ebay
I don't deal with ebay
didn't know usdigital sells just the disc
your loss is my gain
SWPadnos: 2 weeks were more than enough :P
your risk is not my problem ;)
[22:21:53] <fenn> http://www.usdigital.com/products/disk/
i wonder if that ebay guy bought those drives brand new
they sure have a lot of (useless) feature
the parker ones?
I think he said the drives were removed from a factory
hard to tell without any punctuation orwhitespace though
or whitespace :)
Hmmm just realized another thing
the quad. is done by positing the LEDs.... not on the disc!
ds2, you can do it either way
but in either case, you have to be sure the alignment between the two pickups is good
eh, can't you just rotate the sensor slightly to get them in phase?
SWPadnos: yes, but doing on the disc requires even higher rez
I think it's a waste of time to try to make your own encoders/disks, considering the low cost options available
if you want to do it as a learning experience, good for you. if you want to do it because you think it'll save you something, well, have fun :)
until now, I didn't see disc themselves being available... of course the enter assembly isn't that stepp
SWPadnos: what if i want to do it because i'm making an army of clanking replicators?
then you're an idiot, and you have watched "Sky Captain and the World of Tomorrow" several times too many :)
[22:26:33] <skunkworks_> http://www.electronicsam.com/images/KandT/servostart/Endoder1.JPG
skunkworks_: how does that attach to the shaft btw?
the metal disc in the center is a setscrew collar?
diy encoder & motor http://www.youtube.com/watch?v=tE9Fr7kBwVo
( do not connect this thing to a cutting tool :)
looks a bit wobbly
wow "sky captain and the world of tomorrow" is a recent movie
so now we know you go to the movies like once every 5 years ;)
was this actually a popular movie?
it wasn't all that popular
fenn: ok, re-installed everything emc2 in synaptic. still no compile. same error about opengl and python. what's up?
I like it because of the visuals
angelena jolie in latex ( pre thai tattoo )
i bet it was done by the same guy who made starship troopers
also I thought it did pretty well at setting the 1930's sci-fi mood. but the story was only OK, and the acting was only pretty good
Roguish: what's the python error you get?
last line of the traceback
checking for site-package location... /usr/lib/python2.4/site-packages
checking GL/gl.h usability... no
well, I don't know about that. I do think that Starship Troopers was one of the biggest piles of steaming doggie-doo I've ever seen
checking GL/gl.h presence... no
checking for GL/gl.h... no
configure: error: Required OpenGL header missing. Install it, or specify --disa ble-python to skip the parts of emc2 that depend on Python
Roguish, try apt-get build-dep emc2
I think it shouldn't be necessary, but what the heck - see if apt wants to install anything from that
on my system that file comes from mesa-common-dev
Maintainer: Debian X Strike Force :)
no luck. same error.
it looks like the openGL stuff isn't a dependency of emc2-dev, but it is part of the build-dep
Roguish, did apt-get build-dep emc2 install anything?
no, no emxc2-axis
axis is part of emc2 now, so there's no separate pacjage
ok, which one?
apt-get build-dep emc2
well, opengl should be a dependency then
it's a build dependency, but not an emc2-dev package dependency (if I'm reading the control file correctly)
where is that file btw?
[22:42:35] <SWPadnos> http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/debian/control.in?rev=1.16
oh hey its just like the apt-cache show output
Roguish: usually computer stuff is hard to read and full of <>'s and stuff
note the build-depends line has opengl/mesa stuff in it, whereas the depends line for emc2-dev doesn't
the 'apt-get build-dep emc2' installed a few things, but still same error.
you may need to clearthe configure cache, but I don't remember how to do that
boot? good ms answer
do you have nvidia restricted drivers installed?
i do not think so. i believe i have the supplied ones.
supplied with ubuntu
do you have a file /usr/include/GL/gl.h?
uh.. try sudo apt-get install libmesa-glu1-dev
? Couldn't find package libmesa-glu1-dev ?
that's an error.
libgl1-mesa-dev and libglu1-mesa-dev
sounded like a good guess to me.
it used to be called libmesa, now its called libgl*-mesa
both said 'already newest version'
you may need to force reinstallation of those packages
i could have a messed up graphics install. i was using the onboard ati until last week. i put in a simple nvidia board.
hmm.. neither of those actually provide GL/gl.h
force? ok. how?
I'm not sure how to do it for a build-dep
you can use sudo apt-get --reinstall install emc2-dev
hang on a sec
try sudo apt-get install mesa-common-dev
oh - mesa-common-dev - that sounds good :)
(may not exist on ubuntu though)
and the response was 'already newest version'
ok, that's the one you should reinstall
but i thought reinstalling emc2 should do that
will 'uninstalling' then installing work better?
that's teh thing - I don't know if you can do apt-get -reinstall build-dep emc2
dpkg-query -S /usr/include/GL/gl.h
on my system that's required by libgl1-mesa-dev which is listed in the build-depends line of the emc2 package
and it's already installed on his system
anyone else finds mcmaster's website irritating at best?
not as bad in windows
is there a firefox adobe plugin?
worst website is digikey
digikey is quite usable
mcmaster makes it impossible to compare 2 things by opening up 2 tabs
right-click, open fram in new tab/window
at least with digikey, I can lay them out in different tabs to compare
i'd take digikey over mcmaster any day
right-click, open frame in new tab/window
you cant even click "back" in mcmaster
JymmmEMC: have you tried it with McMaster's website?
ds2: yes, that's what I was talking about
JymmmEMC: it gives me a blank tab
ds2: stop tweaking your browser
it' lets you open two copies of their website
then there is the annoying part where they make the "hot" spot huge so I can't change focus w/o clicking on something GRRRR
JymmmEMC: what browser does that work on?
works for me in FF
and for jmkasunich too
you must be doing it on the left frame
bottom right frame
I wish digikey worked half as well as mcmaster, but to each his own
ok, got it. check: https://launchpad.net/ubuntu/+source/mesa/+bug/29435
did this: "dpkg -r --force-depends mesa-common-dev" followed by "apt-get install mesa-common-dev" restored it on the system
and got a compile on emc2-trunk. THANKS ALL (fenn, swpadnos, et. al.) for the help.
looks like it is a problem in a breezy to dapper upgrade.
by the way. i think mcmaster is by far one of the best and most usable websites around.
I can't stand it :)
it's better than Mouser, worse than digi-key, and about on par with MSC
though the pictorial choices are nice a lot of the time
Mcmaster is great for a single person to use, but it's a PITA to post a link to it on IRC
hey what's the deal with ati and nvidia? do they both hate linux? what a pita this graphics thing is.
there are issues with comparing different things as well. middle-click works very well on digikey, mouser, and MSC
from recent announcements, ATI/AMD may not hate Linux any more
but we'll have to wait and see I think
can m5i20 sink 5mA when signal src is from +24V= ? http://imagebin.org/10342
what part of ubuntu do i need to be in to make a xml file?
48V 1A or something, I think
trying an example in the pyvcp documentation
tomp2: 5i20 can't handle anything over 5V
the 7i37 isolated output card can do 48V 1A I believe
don't go over 5v for sure.
thanks, thats important :) recommend any level shifters?
7i37 works very well. got 2 of them.
oh - right. I was thikning of the isolated I/O card
7i37 takes one 24 signal cable from the 5i20 and gives you 16 isolated ins and 8 isolated outs
if you need a different mix (more outs) it gets tougher
tomp looks at 7i37 , thanks
btw: the 50 pin breakout from DAQstuff uses terminal strips that are vertical and close together (2x25). This kind of strip has the entrance horz at .05 from boards surface and has a metal 'spring' that the screw presses against your wire. You cant get tiny wires to move the spring and gain entrance. I made a tool to bend them so i could get the wires in.
no way to order mesa on line? well, maybe the phone call will find prices on the 'snap on terminal strips' for the 7i37T
bye for now, thanks