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[01:47:28] <skunkworks> jepler: so - thinking about what you said earlier..
[01:47:55] <skunkworks> if you has a square
[01:48:06] <skunkworks> g0x0y0z0
[01:48:24] <skunkworks> g1x1y0z.1
[01:48:45] <skunkworks> g1x1y1z.2
[01:49:00] <skunkworks> g1x0y1z.3
[01:49:19] <skunkworks> g1x0y0z.4
[01:49:58] <skunkworks> does this make sense?
[01:50:03] <jepler> yes
[01:51:13] <jepler> so if you sample a position and it's z=2.1 then you know it should be x=.9 y=1
[01:52:05] <jepler> if it's x=.9 y=.99 because this is still the tail-end of the blend, then the error is .01
[01:52:31] <jepler> er something like that
[01:52:45] <skunkworks> so i couldok
[01:55:03] <skunkworks> so i could do more comlicated shapes if i made a table of postitions..
[02:04:02] <Tom_itx> PCW, any idea when you'll have 7i47s in stock? unfortunately it got that board too
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[12:08:05] <skunkworks> zlog
[12:08:05] <zlog> skunkworks: Log stored at
http://tom-itx.no-ip.biz:81/~tom-itx/irc/logs/%23linuxcnc-devel/2015-06-25.html
[12:12:05] <skunkworks> I could just make a comp that reads a gcode file so that when I give it a Z position - I get an x - y position back. Easy peasy :)
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[13:03:33] <jepler> ooh the "dragonboard 410c" is actually shipping -- 64-bit ARM for <$100. arrow says mine will ship tomorrow.
http://www.arrow.com/campaigns-na/qualcomm/dragonboard-410c/
[13:10:33] <jepler> kernel is based on 4.0.0 so -rt should be possible
[13:10:37] <jepler> just what I needed, a new project!
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[13:14:47] <jepler> .. 1.8v SPI on a 2mm-pitch connector .. sound familiar?
[13:17:25] <pcw_home> a purpose built FPGA card could just use 1.8V on one FPGA bank
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[13:30:07] <pcw_home> And at least its built to some kind of standard (not just the hot dev board of the week)
[13:30:09] <pcw_home> and... the I/O pinout is in the 96 board standard Jolly good!
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[13:37:16] <pcw_home> no provision for mounting daughterboards though :-(
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[13:40:45] <pcw_home> Hmm Maybe there is (one picture shows soldered in spacers but others do show empty mounting holes)
[13:47:49] <Tom_itx> Seems like sale partner arrow is unable to provide the power supply connector
[13:47:56] <Tom_itx> hope you have one
[13:49:04] <pcw_home> I like the 7-18V input
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[13:50:56] <skunkworks> better yet - give it the xy feedback and it also calculates the following error...
[13:52:07] <pcw_home> is there a peak detector comp?
[13:52:19] <skunkworks> yes
[13:52:37] <skunkworks> well - I assume so - that is how I have peak acc/vel...
[13:52:48] <skunkworks> just don't remember how I did it
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[13:55:24] <pcw_home> next step is RMS error :-)
[13:59:57] <skunkworks> my nexus has a snapdragon.. I really like it.
[14:00:31] <skunkworks> 15.04 is out?
[14:00:45] <skunkworks> oh - that isn't lts
[14:02:51] <jepler> right
[14:03:59] <jepler> pcw_home: there's a component called "minmax"
[14:06:04] <skunkworks> hmm
[14:06:05] <skunkworks> https://groups.google.com/forum/#!topic/machinekit/FlCoP6Q2Tu0
[14:06:25] <skunkworks> that makes me think that they don't have their machine setup correctly...
[14:09:33] <pcw_home> Preemt-RT 4.05-rt4 seems at least as good as 3.18 on X86 (been up a week on my Core Duo at 3 KHz)
[14:10:33] <jepler> if I never read the word "m------k--" again I would be a happy man
[14:10:48] <archivist> skunkworks, the ability to change axis order was recent ish is that in the other codebase
[14:11:18] <skunkworks> jepler, sorry
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[14:16:08] <jepler> skunkworks: I don't fault you for trying to be a helpful participant in all these different communities.
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[14:17:13] <pcw_home> LTS maybe somewhat less important with Preempt-RT since its simple to build a suitable kernel
[14:17:15] <skunkworks> the preview if setup correctly should work though - right? THis looks right
[14:17:16] <skunkworks> https://youtu.be/R1DCXe9t3UE?t=1m22s
[14:18:21] <jepler> in axis in linuxcnc there are still limitations on the kinds of rotation that will be previewed correctly
[14:18:34] <pcw_home> linuxcnc/mint17.1 runs ok with Preemt-RT for example
[14:19:24] <jepler> but I believe that many 4- and 5-axis systems can be correctly previewed at least when the center of rotation is around 0,0 in the respective plane
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[14:23:27] <skunkworks> heh - the tool doesn't quite look like it is pointing in the right direction in the preview
[14:26:15] <jepler> someone, maybe archivist, has a sane-sounding rotary axis setup that I failed (some time ago) to figure out the correct GEOMETRY string for
[14:27:28] <archivist> my 5 axis is still on an old emc2 so none of that nicety for me
[14:29:08] <jepler> I wonder who I'm thinking of then
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[16:29:42] <seb_kuzminsky> jepler: hm2-encoder-dpll (357ce4229) looks really good to me, feel free to push to 2.7
[16:31:23] <mozmck> seb_kuzminsky: I think Curtis is probably talking about rebasing on master
[16:31:55] <jepler> seb_kuzminsky: thanks, will merge to 2.7 and push, hopefully this evening.
[16:32:01] <mozmck> Or maybe he doesn't realize that is how it is normally done?
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[19:11:37] <mozmck> For some reason emails I send to emc-developers takes a long time to show up.
[19:17:00] <Tom_itx> maybe they are spam filtered
[19:17:55] <Tom_itx> all my emails to the Mrs go straight to her spam folder :(
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[19:27:25] <mozmck> heh, I don't know. The list is on sourceforge, and they come through, but it takes hours or even a day or so sometimes.
[19:28:01] <Tom_itx> one reason i like irc.
[19:28:07] <mozmck> me too.
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[19:48:50] <mozmck> jthornton: shouldn't it be "Hardware Abstraction Layer" instead of "Hardware Abstract Layer"?
http://www.linuxcnc.org/docs/2.7/html/
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[20:24:33] <mozmck> jepler: is your "[PATCH] WIP do iptables and sysctl configuration automatically" change one you are going to push?
[20:24:57] <jepler> mozmck: I'd like to. were you able to test with it?
[20:25:01] <mozmck> It seems to work with a 7i92 here.
[20:25:13] <mozmck> I may not know how to test as well as I should though.
[20:25:13] <jepler> ok
[20:26:09] <mozmck> I ran latency tests and things looked good - without doing the sysctl and iptables stuff manually.
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[20:26:17] <jepler> OK
[20:26:22] <jepler> thank you for testing
[20:26:42] <mozmck> I did list the iptables rules and it shows the hm2_eth rule, and it gets populated while linuxcnc is running.
[20:27:55] <jepler> that's good testing too
[20:30:10] <jepler> I'll dust it off and ask seb for review before pushing to 2.7.
[20:31:34] <mozmck> ok, thanks! It will be helpful.
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[20:56:44] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 14a41db 06linuxcnc 10docs/src/gui/gladevcp.txt docs: fix a markup typo in gladevcp docs * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=14a41db
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[21:44:36] <KGB-linuxcnc> 03Jeff Epler 052.7 ffc13ed 06linuxcnc Merge branch 'jepler/hm2-encoder-dpll' into 2.7 * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=ffc13ed
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[22:04:15] <KGB-linuxcnc> 03Jeff Epler 05jepler/hm2-eth-simplify 66f0669 06linuxcnc 10docs/man/man9/hm2_eth.9 10src/hal/drivers/mesa-hostmot2/hm2_eth.c hm2_eth: do iptables and sysctl configuration automatically * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=66f0669
[22:04:56] <jepler> mozmck: I updated that patch, do you want to test again? I didn't change anything substantial.
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[22:24:39] <PCW> I think I have a relatively simple way to run multiple hm2_eth cards efficiently (when I ever get some free time)
[22:26:39] <jepler> on one ethernet interface?
[22:26:50] <PCW> yeah
[22:27:23] <jepler> there are a few places the driver will have to change to support >1 7i80, whether that's on 1 or more ethernet interfaces
[22:27:28] <PCW> with a gige switch
[22:27:58] <jepler> now you have to worry about latency in the switch too?
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[22:28:41] <PCW> yeah theres store+forward time but thats about it on good switches
[22:30:16] <PCW> I somehow had the mistaken impression that GigE didn't allow small packets but that's only true for half duplex
[22:31:42] <jepler> hm, and even the latency wouldn't matter terribly if the driver could send all its read packets and then receive all the responses
[22:31:50] <jepler> rather than sending one read packet and waiting for response, etc
[22:32:04] <jepler> not sure right offhand if that's a big change to the driver structure..
[22:33:00] <PCW> yeah it would be best if the driver could send all packets in one call not sure if that;s in the network API
[22:33:55] <jepler> that would be a step beyond what I was thinking of
[22:33:59] <PCW> on GigE the time between the ~100 byte packets is very small
[22:34:40] <PCW> the switch is basically a concentrator
[22:35:46] <PCW> the 10/1 ratio in speeds means the store+forward delays are minor
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[23:35:27] <linuxcnc-build> build #3223 of 0000.checkin is complete: Failure [4failed] Build details are at
http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/3223 blamelist: John Thornton <bjt128@gmail.com>
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[23:52:10] <Tom_itx> PCW you around?