#linuxcnc-devel | Logs for 2014-08-27

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[09:25:43] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 0be74b3 06linuxcnc 10(20 files in 2 dirs) hm2 sample config: set HOME_SEQUENCE * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=0be74b3
[09:25:43] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog e475e70 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: don't enable the watchdog in hm2_read() and hm2_read_gpio() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=e475e70
[09:25:43] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog e11f529 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: write the watchdog in hm2_write_gpio() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=e11f529
[09:25:46] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 3783e06 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c 10src/hal/drivers/mesa-hostmot2/hostmot2.h 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: simplify how "watchdog period is short" warning is printed * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=3783e06
[09:25:51] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 7f06e0a 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: simplify auto-enabling of the watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=7f06e0a
[09:25:55] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 2549bf5 06linuxcnc 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: reflow the hm2_write() function (no behavioral change) * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=2549bf5
[09:26:00] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog e28e8fa 06linuxcnc 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: move watchdog petting from pet_watchdog() to watchdog_write() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=e28e8fa
[09:26:04] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog dc15ef3 06linuxcnc 10docs/man/man9/hostmot2.9 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: remove pet_watchdog from the docs * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=dc15ef3
[09:26:08] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 9d674f9 06linuxcnc 10configs/by_interface/mesa/hm2-servo/hm2-servo.hal 10configs/by_interface/mesa/hm2-stepper/hm2-stepper.hal 10configs/by_interface/mesa/plasma-5i20/plasma-5i20.hal hm2 sample configs: stop calling pet_watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=9d674f9
[09:26:49] <linuxcnc-build> build #2370 of 0000.checkin is complete: Failure [4failed fetch branch to local git repo] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/2370 blamelist: Sebastian Kuzminsky <seb@highlab.com>
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[10:08:12] <seb_kuzminsky> glo is down from here
[10:23:59] <skunkworks_> with cradek and jepler just disappearing - they must be having connection problems
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[12:12:34] <jepler> still bad thread times with spi kernel driver affinity fixing and removal of kernelspace memory allocation
[12:12:55] <jepler> back to pessimism and expecting to eventually have to write a full spi driver
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[12:15:57] <skunkworks> darn
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[13:36:19] <seb_kuzminsky> linuxcnc-build: force build --branch=seb/master/hm2-watchdog 0000.checkin
[13:36:20] <linuxcnc-build> build forced [ETA 1h13m33s]
[13:36:20] <linuxcnc-build> I'll give a shout when the build finishes
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[14:03:45] <jepler> so probably I should make an unholy mashup of spidev.c and spi_s3c64xx.c that presents the same userspace API as spidev but gets rid of all runtime resource/memory allocation and anything async
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[14:09:48] <jepler> now I know what cradek meant when he said he "did what the e-mail said" to merge a github pull request
[14:09:57] <jepler> he means the instructions in the individual e-mail that github sends for a pull request
[14:10:00] <jepler> that's nice
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[14:33:08] <linuxcnc-build> Hey! build 0000.checkin #2371 is complete: Success [3build successful]
[14:33:08] <linuxcnc-build> Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/2371
[14:35:43] <skunkworks_> jepler, where you able to rw registers?
[14:35:56] <skunkworks_> on the spi?
[14:36:23] <jepler> skunkworks_: no, I'm still scratching my head
[14:45:41] <brianmorel99> http://www.linux.com/news/enterprise/high-performance/147-high-performance/785558-99-parallella-supercomputer-has-successful-launch-after-18-months
[14:46:26] <brianmorel99> No idea if it might be usefully as the FPGA stuff is over my head, but it looks interesting.
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[15:05:27] <mozmck> that parallella does look interesting - does anyone here have one?
[15:08:57] <brianmorel99> I don't I'm still playing with the Jetson TK1. Article says the basic unit is stock for general availability.
[15:09:18] <mozmck> Yes, they show to be in stock on amazon.
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[15:23:33] <CaptHindsight> mozmck: I was waiting for them to be available again. ZYNQ + multicore DSP but no GPU
[15:25:59] <brianmorel99> Sounds like they should have the "Embedded" version available soon. That has the Zynq Z7020 with it's larger FPGA, but it still "sounds" smaller than what MESA uses although I really have no idea what that means.
[15:26:14] <CaptHindsight> I'll be pleasantly surprised if they become popular since the DSP requires everyone's software to be rewritten to make use of the DSP
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[15:27:01] <CaptHindsight> the same way the GPU clusters were considered failures at Los Alamos and Sandia Labs
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[15:28:01] <brianmorel99> I was just thinking about the combination ARM / FPGA on the Zync SOC, but I guess the DSP might be usefull also.
[15:28:38] <CaptHindsight> the ZYNQ prices never really came down
[15:29:25] <CaptHindsight> I have some ZED boards with the ZYNQ
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[15:33:52] <CaptHindsight> https://www.osadl.org/Latency-plot-of-system-in-rack-b-slot.qa-latencyplot-rbs8.0.html ZYNQ with preempt_rt 3.12.24-rt38 latency histogram
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[15:41:38] <mozmck> How do you find what chip that is?
[15:42:05] <mozmck> I'm also not sure how to read the histogram
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[15:46:00] <kwallace2> If I had a few buckets of free time, I'd be looking at this https://www.olimex.com/Products/DSP/Development/ http://www.ti.com/lit/an/spra327/spra327.pdf , but what I know about DSPs could fit on the head of a pin.
[15:47:18] <brianmorel99> I think 100us max would mean it's too high for soft-stepping, but if you could utilize the FPGA for a stepper it might work. Also, I'm pretty sure the Xenomai folks have a patch for the Zynq.
[15:47:23] <skunkworks_> mozmck, it looks like its maximum latenyc is around 80us... (at 1e+7 samples)
[15:48:49] <skunkworks_> brianmorel99, seems to be the trend.
[15:49:39] <pcw_home> even 300 or so usec latency is ok for hardware stepgens
[15:50:41] <mozmck> logger[psha]:
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[15:52:20] <pcw_home> and even more could be accommodated by using a DPLL on the FPGA for sampling
[15:52:22] <pcw_home> or using the real sample time for doing PID error calculations
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[15:55:30] <brianmorel99> pwc_home: How long before you throw an ARM SOC on a 5i25 for a single source solution for us :)
[15:56:53] <pcw_home> Problem with Arms SOCs is that they go out of style in about 2 years
[16:00:53] <seb_kuzminsky> http://opencores.org/project,core_arm
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[16:02:52] <pcw_home> yeah...
[16:03:07] <seb_kuzminsky> ;-)
[16:03:23] * seb_kuzminsky <-- knows nothing about what he's suggesting
[16:04:25] <pcw_home> I wonder how long before they would be sued by ARM inc if their core worked...
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[16:08:57] <pcw_home> looks like as soon as you have a MMU you are in lawsuit land...
[16:10:22] * skunkworks_ is waiting for his refurbished asus nexus 7...
[16:10:40] <skunkworks_> out for delivery...
[16:12:50] <jepler> brianmorel99: I have a parallela board. in terms of speed building linuxcnc, it's in the same realm of 'intolerably slow' as the bbb, over 50 minutes. that slow and I assume it's not going to *run* linuxcnc well either. (I didn't get as far as putting an RT kernel on it)
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[16:18:24] <brianmorel99> jepler, that sucks. I have the Jetson TK1 and it's very quick, but I have to flash it to get U-Boot on it so I can try isolcpu to see if it improves the latency I'm seeing
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[16:29:30] <jepler> zync z-7010 is "28k logic cells" (in "7-series", 1 cell = 4 luts & 8 flip-flops). by comparison, a recent mesa card is on xc6slx9 which has 9,152 logic cells (also for LUTs and 8 FFs in spartan6)
[16:29:35] <jepler> so it's plenty big for hostmot2
[16:30:07] <pcw_home> Yeah the Zynqs have very large FPGAs
[16:30:39] <pcw_home> I think its like a Artix part
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[16:31:10] <kwallace2> Does anyone know the manufacturer of this? http://www.ebay.com/itm/271455379375 I suspect Lapsun is a distributor. I'm looking for more details on what's inside.
[16:32:03] <jepler> kwallace2: that's an interesting looking device!
[16:33:03] <jepler> I didn't know a c-mount camera could be had for so relatively little money, I guess I never looked.
[16:33:53] <kwallace2> Yeah, kind of like a Hero without the water proof case and c-mount.
[16:37:02] <jepler> same item, same price on aliexpress http://www.aliexpress.com/store/product/5MP-TV-HDMI-USB-Industry-Digital-C-mount-Microscope-Camera-TF-Video-Recoder-DVR-lens-for/205483_1836066761.html
[16:40:43] <kwallace2> I'm tempted to buy one so I can take it apart.
[16:44:55] <brianmorel99> jepler, what kind of latency are you seeing on the arm board you are working with?
[16:45:27] <jepler> brianmorel99: just running the linuxcnc latency-histogram I see +-40us over hours. http://emergent.unpythonic.net/01407410572
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[16:46:28] <jepler> brianmorel99: but using unmodified /dev/spidev1.0 (goal: talk to mesa 7i90) I see >5ms thread times almost immediately
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[16:46:36] <brianmorel99> jepler: That's just Preempt-RT right? Did you have to isolate the cores and/or move irq's around?
[16:46:38] <jepler> and even with all the tweaks I've found, I get >500us thread times overnight
[16:47:14] <jepler> brianmorel99: yes, one of the things that improved spidev access was to isolate the kernel processes that correspond to the spi device onto the same CPU that linuxcnc uses for rtapi_app
[16:47:47] <jepler> somewhere I have a graph with isolcpus=3; I think it was a bit better than that graph you see which was without isolcpus
[16:48:24] <kwallace2> I'm wondering if I could use this: http://www.edmundoptics.com/technical-resources-center/imaging/what-is-telecentricity and some SurplusShed lenses to make a telecentric lens?
[16:49:09] <brianmorel99> The Jetson was 100k+ us at first, but when I moved all the IRQ's to the first core it's down in the 40-50k range, but there are still a lot of schedular IRQ's on the last two cores.
[16:49:37] <brianmorel99> It ships with fastboot bootloader, so i can't try isolcpu until I flash it with U-Boot
[16:49:53] <jepler> brianmorel99: in my case, the very good latency overnight says that IRQs running on the linuxcnc rtapi_app core are not my problem
[16:50:09] <jepler> it's something specific to the spi driver stack
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[16:51:03] <brianmorel99> That's what I've read. I assume the ethernet controller is on the USB bus so that's why you are trying SPI ?
[16:52:18] <jepler> yes
[16:52:20] <brianmorel99> FYI the uspace / master branch built perfectly on the Jetson
[16:52:29] <jepler> that's cool news!
[16:53:36] <brianmorel99> If I can get the latency in a reasonable area I want to try the ethernet (it's on the pcie bus) and / or use an adapter in the mini-pcie slot to a 6i25
[16:55:07] <jepler> either one would be cool
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[17:02:39] <kwallace2> seb_kuzminsky, thanks for the glass machining link: http://benkrasnow.blogspot.com/2011/08/cnc-milling-glass-plates-and-mirrors.html . I got some microscope slides and diamond burrs on order.
[17:08:44] <seb_kuzminsky> kwallace2: glad it was helpful! ben krasnow's got some crazy projects
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[17:26:54] <seb_kuzminsky> whoops, the "splash gcode" for axis in lathe mode still says EMC2
[17:31:51] <seb_kuzminsky> i noticed this while trying to repro Janos Bujtar's bug report against the lathe-fanucy sample config (which works for me in rip)
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[18:03:42] <jepler> seb_kuzminsky: isn't the "copy config" functionality only going to be invoked if it's a package version?
[18:03:49] <jepler> or maybe if the configs/ tree is not writable
[18:05:16] <jepler> confirmed with 2.6.0-pre5 running live from binary.hybrid.iso
[18:07:43] <jepler> this was discussed almost exactly a month ago here
[18:08:44] <jepler> http://linuxcnc.mah.priv.at/irc/%23linuxcnc-devel/2014-07-27.html#20:51:43
[18:09:24] <jepler> [21:12:32] <jepler> I think the use of "../" paths is not handled by the config picker's copy logic
[18:09:30] <jepler> [22:29:21] <jepler> or move the file that needs duplication into common and arrange for it to be copied
[18:09:36] <jepler> I think this is the cause and I think this is the best solution
[18:10:23] <jepler> lathe-fanucy is the only config with HALFILE = ../...
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[18:48:11] <kwallace1> In case someone has five minutes to waste. (lathe board test - the movie) http://www.wallacecompany.com/tmp/lbt_the_movie.ogv
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[19:13:50] <skunkworks_> kwallace1, what does the auto/manual do?
[19:14:33] <skunkworks_> is there some sort of test 'script' that wiggles the bits?
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[19:20:03] <kwallace2> Auto toggles each command button in sequence automatically. Each test checks the response bits and counts how many servo cycles the response(s) is high. Each test will have a high count range that is considered okay. The manual mode is available to to play with parts of the board individually.
[19:29:21] <kwallace2> The count values are shown by the show pins at the end. I haven't done the value check software yet. So far, it looks like I'll just have a Pass/Fail indicator added to the UI screen.
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[20:05:10] <jepler> oh hey, apparently someone is working on upstreaming devicetree support for the odroid u3. https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/exynos4412-odroidu3.dts?id=refs/tags/v3.17-rc1 unfortunately, it reportedly has an unspecified issue. http://forum.odroid.com/viewtopic.php?f=83&t=3174#p49979
[20:06:32] <seb_kuzminsky> that's nice to hear
[20:06:46] <jepler> I think 3.17 blows past where there are preempt-rt patches though
[20:07:01] <seb_kuzminsky> 3.17 isnt even out yet, is it?
[20:07:43] <jepler> no
[20:07:53] <seb_kuzminsky> 3.14 seems to be the newest rt-preempt patch
[20:08:13] <jepler> from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-rt.git I have v3.12-rt as the newest
[20:08:37] <seb_kuzminsky> pfft, git? try tarballs: https://www.kernel.org/pub/linux/kernel/projects/rt/
[20:08:55] <jepler> *frustrated dog whine*
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[20:18:53] <jepler> - tx_dev = &master->dma_tx->dev->device;
[20:18:55] <jepler> + tx_dev = master->dma_tx->device->dev;
[20:20:05] <skunkworks_> as easy as that?
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[20:20:40] <jepler> just looking at others' changes in spi-related files in linux
[20:20:52] <jepler> I have no clue what that does, except make me wish the variable names were more enlightening
[20:21:35] <jepler> ugh, they increased the tolerance for a late spi response from (calculated time + 10ms ) to (2*(calculated time) + 100ms)
[20:22:44] <seb_kuzminsky> lol
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[20:22:55] <seb_kuzminsky> oops, that was inconsiderate of me
[20:23:12] <jepler> I'm never hitting a 10ms latency so I don't think it's anything that affects me
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[20:28:33] <jepler> I don't see anything in the logs ..v3.17-rc2 or ..v3.12-rt that seems relevant to realtime performance of spi
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[20:48:36] <MrHindsight> looks like RTAI works without the isolcpus=x needing to be set, we were seeing real time changing cores after restarting
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[20:50:46] <MrHindsight> is it worth building debs for testing 3.14 RTAI yet?
[20:53:43] <MrHindsight> is there a howto for building kernel and RTAI debs?
[20:55:23] <seb_kuzminsky> i've got a bit of a rickety build system that i used for the wheezy & precise rtai kernels
[20:55:37] <seb_kuzminsky> i'll publish it on github so you can take it for a spin
[20:57:12] <MrHindsight> thanks, I'd like to try it
[20:57:58] <seb_kuzminsky> you wont say that after you see it - it's really terrible
[20:58:30] <MrHindsight> so it's possibly worse than nothing?
[20:59:04] <seb_kuzminsky> heh
[20:59:31] <seb_kuzminsky> well... it makes kernels that fit into the debian package ecosystem, i guess that's not nothing
[20:59:46] <seb_kuzminsky> but it's not simple, and it's not straightforward
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[21:45:45] <PCW> micges: did you see seb got rid of the separate feed wd function?
[21:46:18] <micges> no
[21:46:56] <PCW> he bundled it with hm2_write
[21:47:48] <micges> ah I see it
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[21:53:11] <micges> yeah great stuff
[21:54:21] <seb_kuzminsky> it's in a branch called seb/master/hm2-watchdog, it's not in master yet
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[21:55:06] <seb_kuzminsky> micges: any feedback you have on it is welcome
[22:02:18] <micges> seb_kuzminsky: so now first write enables wd right?
[22:02:32] <micges> also write_gpio I see
[22:02:54] <seb_kuzminsky> yes, those are both right
[22:03:13] <seb_kuzminsky> in master (before this branch), write, write_gpio, and pet_watchdog would all enable the watchdog
[22:03:40] <seb_kuzminsky> err, maybe write_gpio didnt, but that was a bug
[22:04:00] <seb_kuzminsky> now (after this branch), pet_watchdog is gone (write does the petting now), and write and write_gpio both enable the watchdog
[22:05:18] <micges> I see it
[22:05:41] <micges> and you tested that 'too short wd time' is showing only once?
[22:05:45] <seb_kuzminsky> yep
[22:08:03] <jepler> http://emergent.unpythonic.net/files/sandbox/tmax-increased-trigger.png
[22:08:18] <jepler> this (.tmax-increased) was easy to add, and it seems like it might be handy
[22:08:58] <seb_kuzminsky> jepler: yeah, a handy debugging signal
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[22:19:29] <skunkworks_> jepler: I was needing that recently...
[22:19:32] <skunkworks_> awesome
[22:20:11] <micges> seb_kuzminsky: maybe petting wd should be done by tram write?
[22:20:49] <seb_kuzminsky> i bet you're right
[22:21:22] <micges> then it will remove additional packet from hm2_eth and further packeted transport layers
[22:21:34] <seb_kuzminsky> the hm2-eth stuff doesn't use tram, does it? you've got your own batching system independent of tram?
[22:21:46] <PCW> maybe hm2_spi as well
[22:22:09] <seb_kuzminsky> i thought they both batched in a different way. am i mistaken?
[22:22:18] <seb_kuzminsky> i havent actually studied the new code...
[22:24:02] <micges> seb_kuzminsky: it's simply pack prepared eth packet in one
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[22:26:06] <seb_kuzminsky> does it take the stuff that's been queued up in tram, or does it also capture things that get written directly via llio->write?
[22:26:47] <jepler> seb_kuzminsky: there are two new function pointers
[22:26:48] <micges> stuff from tram
[22:27:16] <jepler> seb_kuzminsky: the new function pointers (queue_read / queue_write) are allowed to gather up requests
[22:27:26] <jepler> until a request with length -1 is made, then they complete all the queued requests
[22:27:35] <jepler> hm2_eth has one read request queue and one write request queue
[22:27:45] <jepler> while I wrote hm2_spi with a single queue
[22:29:25] <jepler> for drivers which don't have the new calls (everything but hm2_eth and hm2_spi), a queue_read / queue_write is simply done immediately by turning around and calling the old read/write methods
[22:31:05] <seb_kuzminsky> so by havint hm2_watchdog_write() explicitly call hm2->llio->write() i goofed up and didn't actually save a packet after all?
[22:31:18] <jepler> you could call ->queue_write
[22:31:22] <jepler> .. I think
[22:31:41] <seb_kuzminsky> or use micges suggestion and put the watchdog reset in tram
[22:33:13] <jepler> yes, when the tram fairy comes along and actually implements tram in hostmot2.ko it'll be a big help
[22:33:57] <micges> I think queue_write will work but eventually it should go to tram
[22:34:05] <seb_kuzminsky> ok, i'll change it
[22:34:24] <PCW> Yeah the wd packet is still there
[22:34:48] <jepler> for eth and spi I'm not sure how important actually using tram is
[22:35:21] <jepler> the setup and turnaround time seem to dwarf the dozen or two bytes of packet size
[22:35:23] <seb_kuzminsky> it shrinks the payload quite a bit, no? not having to have all those addresses on the wire all the time
[22:35:26] <seb_kuzminsky> ah
[22:36:00] <PCW> mainly TRAM was done for DMA capability in the future
[22:36:26] <jepler> http://emergent.unpythonic.net/files/sandbox/tmax-surge.png
[22:36:35] <seb_kuzminsky> but for eth and spi, tram might be helpful to reduce packet count frmo non-queued writes
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[22:36:40] <jepler> so when spi sucks, it sucks for a good quarter second
[22:36:44] <PCW> (and 7I43 configs actually have a unused hardware TRAM)
[22:37:04] <seb_kuzminsky> tram also would help on epp, where there is little overhead but each transaction takes ~1us
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[22:37:11] <jepler> seb_kuzminsky: yes, that's true
[22:38:08] <seb_kuzminsky> wonder what your odroid is doing during that time
[22:38:25] <jepler> that seems harder to determine
[22:39:20] <seb_kuzminsky> just add some hal pins to the linux kernel and watch it in halscope
[22:39:25] <jepler> eeeeeeee
[22:39:45] <jepler> it's something that preempts(?) spidev's activities, because scope's tmax remains low
[22:40:41] <seb_kuzminsky> some other task is hogging the cpu, preventing the bottom half of the spi driver from getting scheduled when it wants
[22:40:45] <seb_kuzminsky> maybe
[22:40:56] <jepler> seb_kuzminsky: yeah I too think that's roughly the story
[22:41:07] <seb_kuzminsky> can you give the spi driver thread a higher rt-preempt priority somehow?
[22:41:23] <jepler> anyway, for "small" spikes, scope.sample.time and spidev.time actually are somewhat correlated
[22:41:32] <jepler> now to wait for another bigger spike in tmax
[22:41:53] <MrHindsight> open a browser :)
[22:42:18] <seb_kuzminsky> sched_setscheduler(SCHED_FUCKYOU)
[22:42:42] <jepler> seb_kuzminsky: that's one thing I've varied in this most recent test
[22:42:57] <seb_kuzminsky> the priority of the kernel thread?
[22:42:58] <seb_kuzminsky> cool
[22:43:01] <jepler> seb_kuzminsky: I found that putting the spi kernel tasks on the same cpu as rtapi_app helped; this time I also raised their priority with chrt
[22:43:27] <jepler> but it's hitting latencies of >120k still, and when it does that in minutes it tends to hit 800k after hours
[22:43:31] <jepler> so I feel like it's probably not the fix
[22:43:38] <seb_kuzminsky> hm, bummer
[22:43:48] <jepler> I'll let it run though
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[22:45:48] <andypugh> I think I use a fixed tram write to poke some hostmot2 modules.
[22:47:00] <MrHindsight> andypugh: what was the combo on your ARM board imx6 + *duino (AVR)?
[22:47:00] <andypugh> TRAM is sort of a comfortable straightjacket, even though it isn’t used, having to code so that it could be if we wanted to imposes limits, but also makes some things simpler
[22:47:32] <andypugh> That was a Udoo. Not got it working yet (no need to) but it looks like a useful board still,
[22:47:51] <andypugh> #udoo exists
[22:48:37] <MrHindsight> memleak is back on the cubie2 since the RTAI for AMD is looking good
[22:49:04] <MrHindsight> lots of magic on that board
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[22:49:50] <MrHindsight> imx6 has PCIe, I might look at that again
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[23:04:34] <CaptHindsight> ethernet on the cubie2 is integrated into the ARM SOC, hm2_eth might just work :/
[23:05:13] <seb_kuzminsky> sweet
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[23:46:53] <jepler> http://emergent.unpythonic.net/files/sandbox/tmax-surge2.png
[23:47:32] <jepler> so maybe something proportionally bad is going on in both functions
[23:47:55] <jepler> but the hugest spike is still reserved for spidev
[23:48:19] <jepler> (note different vertical scales of spidev.time and scope.sample.time)
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[23:56:11] <jepler> nonvoluntary_ctxt_switches ~= 3 * voluntary_ctxt_switches when using spidev
[23:56:26] <jepler> not when not using it
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