#linuxcnc-devel | Logs for 2014-08-08

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[02:17:04] <cradek> seb_kuzminsky: I don't know of anything either
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[02:30:02] <pcw_home> jepler: that looks great!
[02:30:04] <pcw_home> I should make a simple twiddler config to try twiddling I/O bits
[02:30:05] <pcw_home> (so download assembled binary to ROM, not recompile FPGA)
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[02:50:22] <jepler> pcw_home: so in tasm it seems like 'ffh' can parse as a number. does that mean it can't be used as a label?
[02:50:29] <jepler> or do you have to write '0ffh' ?
[02:50:33] <jepler> or otherwise lead with a digit
[02:50:38] <jepler> oh hey it says that right abve
[02:55:24] <jepler> pcw_home: what is UNIQUE? It seems to have something to do with some fancy flow control macros you use...
[02:55:27] <jepler> DUMB8.MAC: UNIQUE ; This label goes to the false-clause, or the endif.
[02:56:13] <pcw_home> unique label i think
[02:56:40] <pcw_home> just a unique jump target label
[03:00:09] <pcw_home> I tend not to use the macro features much, the stuff GIlbert has
[03:00:11] <pcw_home> written uses all that "if else" stuff
[03:00:12] <pcw_home> some of the code is is portable to PICS/DSPICs with the right macros
[03:00:13] <jepler> the docs don't mention UNIQUE or DUP
[03:00:41] <pcw_home> maybe it was added to the assembler
[03:00:51] <pcw_home> (or macro processor)
[03:00:59] <jepler> oh, maybe your own addition?
[03:01:51] <jepler> there's yet a long way to go if I want to build sslbp.asm with my own assembler :-/
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[03:02:10] <jepler> it uses these flow control macros pretty extensively
[03:02:28] <jepler> org 0
[03:02:28] <jepler> nop
[03:02:28] <jepler> nop ;whyyyy
[03:02:33] <jepler> hah
[03:03:00] <pcw_home> SSLBP Is probably the worst, you might try the ssremote code (I just wrote) it uses no macros
[03:03:50] <jepler> just my luck
[03:04:34] <jepler> I have a copy of TWID.ASM here, it looks pretty close to something I could assemble
[03:04:45] <pcw_home> yeah theres fancy macros and include file munging in SSLBP
[03:05:01] <jepler> It's just about bedtime here
[03:05:23] <jepler> anyway, I think I remember discussing that you're no Python hacker, but I went ahead and tossed what I have up here: https://github.com/jepler/pta
[03:05:49] <pcw_home> Ill take a look
[03:06:14] <jepler> it includes a full(?) table for d8 converted from the TASMD8SS.TAB you sent me recently
[03:06:31] <jepler> right now I'm bogged down in parsing numbers :-P
[03:07:01] <jepler> but that, ignoring unknown .DIRECTIVES, and using EQU instead of = should get me pretty close to building TWID.ASM from 2011
[03:07:23] <pcw_home> Thats great since thata the latest and greatest 8 bit proc so very unlikely to change
[03:09:17] <pcw_home> you might compare your output it to twidrom.vhd
[03:10:44] <pcw_home> Actually its not a great example since its for an earlier processor
[03:10:44] <pcw_home> I'll update twidrom.vhd to the newer processor when I get a chance
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[03:15:23] <skunkworks_> https://groups.yahoo.com/neo/groups/mach1mach2cnc/conversations/messages/145216
[03:18:57] <jepler> pcw_home: hmm my assembler doesn't like it
[03:19:26] <jepler> commandregh equ 0401h ; (ptr) host interface command register
[03:19:26] <jepler> ldab commandregh
[03:19:33] <jepler> and I error: ValueError: 1025 (0x401) doesn't fit in 10 bits
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[03:21:34] <jepler> but probably it is actually intending to get ldab @X,1 (?)
[03:21:37] <jepler> well, anyway, it's a night.
[03:21:46] <pcw_home> probably wrong comments in the .tab file
[03:26:44] <pcw_home> Ahh thats code for a one step earlier processor
[03:27:17] <pcw_home> ssremote code is better
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[03:49:48] <skunkworks_> https://www.youtube.com/watch?v=qAqcAZq-vPM
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[12:15:25] <jepler> pcw_home: is 'ssremote' different than 'sslbpfw'? yes, very soon I need a source and tasm-assembled hex output to really check the rightness of pta
[12:15:54] <jepler> at a minimum I still need to implement #include though
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[12:31:15] <pcw_home> ssremote is a implementation of a sserial remote I/O device on a 7I90
[12:31:16] <pcw_home> (SSLBP is the host side sserial controller)
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[12:33:58] <pcw_home> ssremote is a good test example because it uses the
[12:33:59] <pcw_home> latest processor but no macros
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[12:41:49] <pcw_home> http://pastebin.com/pwZBfimn
[12:41:50] <pcw_home> is the build batch file for ssremote
[12:43:52] <jepler> pcw_home: OK, will this be somewhere inside 7i90.zip?
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[12:45:36] <pcw_home> all the source is but the build files are not since they are pretty specific to our environment
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[12:46:36] <jepler> I see this invokes the makeinc and makeram commands you had mentioned a few days ago
[12:47:00] <pcw_home> makeinc is not needed (the equ files are there)
[12:47:14] <jepler> and I can squint instead of using makeram
[12:47:24] <pcw_home> Yep
[12:47:54] <pcw_home> well makeram just includes the appropriate vhdl boilerplate
[12:49:38] <pcw_home> and makeinc is only if you want to say make .h files from the same equates
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[12:51:56] <pcw_home> (for host access to internal attached processor variables for example)
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[12:57:07] <jepler> actually SSREMOTE.ZIP only has SSREMOTE.INC
[12:59:03] <jepler> but I think I can make a plausible .EQU
[13:02:22] <pcw_home> freeby.mesanet.com/SSREMOTE.EQU
[13:04:54] <jepler> hm, to be compatible with tasm I need to not have operator precedence
[13:07:24] <pcw_home> its just left to right? (I would not notice since I dont use any fancy macros or assembler math)
[13:07:33] <jepler> the manual says:
[13:07:34] <jepler> > No operator precedence is in effect. Evaluation is from left to right unless grouped by parenthesis (see example below).
[13:08:32] <pcw_home> ahh
[13:08:42] <jepler> obviously pretty easy to write
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[13:09:01] <jepler> except, with me coding in python, it's easier still to code 'just evaluate this expression with python'
[13:11:40] <pcw_home> probably the only place where this might matter is SSLBP (and maybe could be made compatible with normal
[13:11:42] <pcw_home> operator precedence with parens if not already there)
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[13:26:59] <jepler> after hand-preprocessing ssremote, I can assemble it with two differences
[13:27:28] <jepler> one I am confident is my fault -- I assemble dw with a different byte order than tdasm
[13:28:00] <jepler> the other is a missing 'ret' instruction which I suspect is because the source doesn't quite match the .vhd
[13:28:19] <jepler> stab hm2startwrite
[13:28:20] <jepler> ret
[13:28:20] <jepler> debug8
[13:29:00] <jepler> my output has a 1800 instruction (ret) but the .vhd doesn't
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[13:29:01] <jepler> bbl
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[13:37:01] <pcw_home> Thats a mistake in the debug .asm source
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[13:39:46] <pcw_home> (ret in wrong field) it worked because it fell through to debug8
[13:39:48] <pcw_home> (always wondered why debug init turned on my test leds)
[13:40:44] <pcw_home> (that code is not actually used)
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[13:49:19] <pcw_home> so your assembler is already better than Tasm!
[14:00:50] <jepler> oh I see now that it is a label
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[14:02:03] <pcw_home> well its not _supposed_ to be a label
[14:02:21] <jepler> yes
[14:02:38] <jepler> but I had actually read the part of the tasm documentation that explained that without the leading space it defines a label
[14:02:50] <jepler> I'll "fix" my bug :)
[14:03:14] <pcw_home> but your bug fixes my typos
[14:03:56] <jepler> I think what I had written causes anything that starts in the first column to be parsed as an instruction if it can be, but otherwise to be parsed as a label
[14:04:15] <jepler> anyway, this is pretty cool
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[14:04:49] <jepler> depending how I split my weekend time between working on spi 7i43 and this, I should be able to do the preprocessor part in under a day's work..
[14:04:55] <pcw_home> Thats is cool
[14:05:37] <pcw_home> Ill fix twiddler to use the latest processor and fix the example code since thats a lot easier to actually test
[14:05:53] <jepler> by the way, I don't know if you were inclined to try running any of this, but it requires pyparsing 2.x, which is newer than what is packaged in debian 7 and ubuntu 12.04.
[14:06:40] <pcw_home> is that in ubuntu14.04?
[14:06:50] <jepler> it looks like the version in ubuntu 14.04 should be compatible
[14:07:18] <jepler> they have 2.0.1. I was on debian testing, which has 2.0.2; I know that one works
[14:07:59] <jepler> or, you can just copy pyparsing.py into the directory with pyasm.py
[14:08:43] <pcw_home> Yeah ( is that for python 3.x? )
[14:10:14] <jepler> apparently pyparsing 2.x is compatible with python3. I still write python2.
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[16:08:21] <cradek_> in response to gene's report: http://timeguy.com/gitweb?p=linuxcnc.git;a=commitdiff;h=679045
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[16:09:35] <jepler> cradek: I believe initializing a pin or parameter to zero in a comp should never be necessary
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[16:09:58] <cradek> hmm. I wonder how he got nan, then
[16:10:20] <jepler> it's possible that comp isn't behaving as expected
[16:10:37] <jepler> struct __comp_state *inst = hal_malloc(sz);
[16:10:37] <jepler> memset(inst, 0, sz);
[16:10:58] <jepler> so for parameters, they should all read as zero
[16:11:07] <jepler> without additional initialization
[16:11:08] <cradek> it's the pin
[16:11:13] <cradek> the out pin
[16:11:40] <jepler> yes
[16:11:53] <cradek> does that get zeroed somewhere else?
[16:11:59] <jepler> I'm double-checking on that now
[16:12:19] <jepler> a pin's "dummy signal" gets zeroed:
[16:12:19] <jepler> memset(&new->dummysig, 0, sizeof(hal_data_u));
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[16:12:41] <jepler> and a signal gets initialized
[16:12:42] <jepler> *((hal_float_t *) data_addr) = 0.0;
[16:12:53] <cradek> an out pin doesn't have a dummysig does it?
[16:13:30] <jepler> I think all pins do
[16:13:38] <jepler> they have to be internally connected to something so that *pin is not a segfault
[16:14:09] <cradek> oh I see
[16:15:02] <jepler> should I go actually read gene's report?
[16:15:17] <cradek> does that ever bring you clarity?
[16:15:39] <cradek> Switch the halmeter to lowpass.spindle.out and it displays -nan.
[16:17:00] <jepler> btw a nonzero default gain is probably a reasonable change
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[16:18:00] <cradek> well I can't reproduce his problem, but I'm on sim
[16:18:24] <cradek> his nan could have come from some other place
[16:18:26] <jepler> personally, I'd like to blame hm2 encoder velocity
[16:18:37] <cradek> fair enough
[16:18:46] <jepler> if lowpass ever gets a nan input its output would stick at nan forever
[16:19:02] <cradek> sure
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[16:25:36] <jepler> // FIXME: There's a bug somewhere in this code that
[16:25:36] <jepler> // sometimes makes encoder.velocity NaN. Observed by
[16:25:36] <jepler> // micges, but never reproduced.
[16:26:01] <pcw_home> There were complaints about nans in the hm2-encoder data somewhere but I have not heard a complaint in years
[16:26:16] <archivist> a lowpass should never give a nan that would be another bug
[16:28:00] <archivist> throwing an error if any input sees a nan may be a sensible thing to do
[16:28:15] <jepler> archivist: what should a lowpass filter output in the case that its input is nan?
[16:28:46] <archivist> I am thinking it should be caught earlier
[16:29:02] <cradek> sure, wherever it was generated
[16:30:02] <cradek> I thought it was a bug in lowpass, because I thought it started with an uninitialized value, which could have been nannish. but I was wrong.
[16:32:10] <jepler> like all who have come before me, I can't see how hostmot2 encoder velocity could end up as nan
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[16:33:26] <jepler> 0./0. -> nan, but it sure looks like the divisor dT_s can never be zero (though the test is indirectly via dT_clocks)
[16:34:36] <archivist> should they all recover from nan too
[16:40:13] <cradek> if the old value is nan and the new value is 13, and the gain is .1, it's not clear what the new value could be other than nan
[16:40:38] <cradek> that's how FP math works by definition
[16:40:53] <cradek> I think tracking down the source is the only sane answer
[16:41:43] <archivist> an electronic lowpass would never get a nan output
[16:42:21] <archivist> therefore it would recover from a bad input
[16:45:48] <jepler> if nan is not a permitted output, then why should lowpass be modified to handle it? on the other hand, if it is a permitted output, then why should lowpass do anything but what it does now?
[16:46:24] <jepler> (actually, I could see arguing that for a nan input, lowpass should hold its output, but since nobody's saying it's valid to transport nans on hal signals it's moot)
[16:48:24] <archivist> I can see a case for lowpass throwing an error, but a system will work better if it stays at the previous valid state until the input nan gas gone
[16:48:38] <archivist> gas has
[16:48:46] <jepler> GIGO
[16:48:47] <seb_kuzminsky> hrm, i should have know you guys would be debugging this on irc before trying to reproduce gene's problem here locally
[16:49:05] <cradek> you can't get it either?
[16:49:19] <seb_kuzminsky> i just verified that 'loadrt lowpass names=lowpass.spindle' wfm
[16:49:31] <cradek> yeah that's probably a red herring
[16:49:39] <jepler> of course I didn't consider it could have been names=
[16:49:40] <seb_kuzminsky> a red geneing
[16:49:50] <seb_kuzminsky> jepler: that's very sensible of you
[16:50:11] <seb_kuzminsky> because names= works fine in lowpass, just like it does in everything else and has for years
[16:50:37] <seb_kuzminsky> oops, i tried to email gene a screenshot of it working, but it's too big and got held up by the mailing list
[16:50:48] <seb_kuzminsky> i'll move the pic to a webserver and send another email with a link instead
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[16:57:03] <jepler> well it's clear that most of the time it works
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[16:58:03] <jepler> what I did not expect was that googling "nan" would show three borderline NSFW image results in the first plage
[16:58:16] <seb_kuzminsky> i wonder if micges has seen the problem since... feb 2010 when i added that fixme
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[17:01:34] <jepler> rtapi_s32 dT_clocks;
[17:01:37] <jepler> dT_clocks = (time_of_interest - e->prev_event_reg_timestamp) + (e->tsc_num_rollovers << 16);
[17:02:12] <jepler> what's the speed of the timestamp? Is it at all likely that dT_clocks can become zero due to integer overflow?
[17:05:17] <pcw_home> default timestamp frequency is 1 MHz
[17:05:38] <pcw_home> so ~65 ms between rollovers
[17:06:04] <seb_kuzminsky> the timestamp divisor register is set in hm2_encoder_parse_md()
[17:06:28] <seb_kuzminsky> judging by th enumber of comment lines i wrote about it, i gave the matter some thought, back in 2007
[17:06:36] <jepler> hee hee
[17:08:15] <jepler> so the default is 1MHz and also you try to set it to 1MHz explicitly
[17:08:27] <seb_kuzminsky> looks like i was aiming for ~1000 encoder-timestamp-ticks per servo period
[17:08:35] <seb_kuzminsky> yeah
[17:09:04] <jepler> (in hal, we need a callback which fires when a function is added to a thread
[17:09:26] <jepler> so that it can recalculate stuff based on the intended period)
[17:09:48] <jepler> (though the difficulty of actually writing to hostmot2 registers at this time would be another wrinkle)
[17:10:30] <jepler> bbl
[17:18:35] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 75fb8bc 06linuxcnc 10docs/src/hal/comp.txt docs: fix a typo in comp(1) docs * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=75fb8bc
[17:18:35] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 3eb4239 06linuxcnc 10docs/src/hal/comp.txt docs: clarify comp's usage of count and names * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=3eb4239
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[17:39:24] <cradek> I wonder what version/build gene is using. it might be uspace...?
[17:42:31] <memleak> why would you search for nan in google images anyway?..
[17:43:50] <archivist> google gives you some images for a normal search
[17:52:51] <linuxcnc-build> build #2298 of 1202.rip-lucid-amd64 is complete: Failure [4failed compile runtests] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/1202.rip-lucid-amd64/builds/2298 blamelist: Sebastian Kuzminsky <seb@highlab.com>
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[17:57:06] <linuxcnc-build> build #2304 of 0000.checkin is complete: Failure [4failed] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/2304 blamelist: Sebastian Kuzminsky <seb@highlab.com>
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[18:04:57] <cradek> interpreter did not finish
[18:09:17] <seb_kuzminsky> i've seen that subroutine-return error a couple of times lately
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[18:30:52] <skunkworks_> https://www.youtube.com/watch?v=oZW4hGbRAhs
[18:33:44] <jepler> that's quite the thing
[18:33:51] <cradek> awesome
[18:35:37] <jepler> https://lh6.googleusercontent.com/-IywgXren2Is/U-N2-Q15skI/AAAAAAAANIw/Nx7mIKKfPMQ/w506-h285/pid.gif
[18:36:20] <jepler> oh is it a touchscreen?
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[18:36:53] <cradek> that's neat
[18:36:58] <jepler> https://www.youtube.com/watch?v=j4OmVLc_oDw
[18:37:11] <jepler> yes, resistive touchscreen
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[18:39:08] <jepler> I want one as a desk toy now
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[18:39:50] <cradek> my pile of old digitizing tablets have got to be good for something like that
[18:41:49] <archivist> but it uses an arrrhguinoooo
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[19:14:35] <CaptHindsight> that quilting machine is interesting, and chose to modify AXIS vs Gmoccapy
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[22:00:34] <seb_kuzminsky> jepler: we're getting these intermittent failures in the subroutine-return test, you made commit b2b19548 a while back and the commit message makes me think you saw improvement after?
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[22:16:34] <skunkworks_> wheezy sure seems fussier with hardware... hmm - I should load the rt-preempt kernel and see
[22:20:10] <seb_kuzminsky> i wonder if just upping the interpreter-idle-check timeout from 2 seconds to like 1 bajillion would fix it
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[22:33:34] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 30226cf 06linuxcnc 10tests/interp/subroutine-return/test-ui.py tests: give subroutine-return more time to do its thing * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=30226cf
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