#linuxcnc-devel | Logs for 2014-07-17

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[04:36:25] <tjtr33> hello, whats md5sum of binary.hybrid.iso?
[04:43:29] <tjtr33> i get be28ea49b99854ea130dc8eed208a5f8 binary.hybrid.iso if it seems bad burn i'll report back
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[05:50:47] <KGB-linuxcnc> 03Chris Morley 05v2.5_branch 348ace4 06linuxcnc 10src/emc/usr_intf/pncconf/pncconf.py pncconf -fix error with firmware with more then 5 sserial channels * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=348ace4
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[13:15:46] <skunkworks> cradek, win32diskimager also works in windows 7..
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[13:20:21] <cradek> awesomeness
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[14:01:26] <KGB-linuxcnc> 03Jeff Epler 05jepler/rtos-uspace-apis 0fc7ad3 06linuxcnc 10src/Makefile 10src/hal/drivers/mesa-hostmot2/setsserial.c setsserial: port to uspace and enable (untested) * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=0fc7ad3
[14:05:44] <jepler> linuxcnc-build: ^^ let me know how that works out, OK?
[14:06:24] <jepler> when I get back from this trip, if no more review items or outright objections turn up in my e-mail, I intend to push this to master branch. this would be sunday/monday.
[14:06:35] <skunkworks> http://wiki.linuxcnc.org/cgi-bin/wiki.pl?Hybrid_Iso
[14:06:39] <jepler> assuming me and buildbot can come to an agreement
[14:06:40] <skunkworks> cradek, ^
[14:07:51] <cradek> yay! thanks!
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[14:14:59] <cradek> I'm adding linux instructions
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[14:16:16] <skunkworks> cradek, I was hoping... ;)
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[14:27:00] <cradek> ok, I did my best
[14:27:45] <skunkworks> yay!
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[14:37:42] <cradek> if I put commented-out sources in linuxcnc.list, they show up as unchecked/unselected in synaptic. this is nice, because I can put the buildbot alternatives right there.
[14:38:41] <cradek> I'm also installing "nopaste" by default, which is an automatic pastebinner. so you can do things like "dmesg | nopaste" and it gives you a URL in return.
[14:38:59] <cradek> I wonder what other things I can do to make things easy on the (haha) support department
[14:39:19] <skunkworks> some editor other than mousepad? ;)
[14:39:28] <skunkworks> or whatever it is called...
[14:39:32] <cradek> hmm
[14:39:37] <cradek> is the editor bad, or just the name?
[14:39:56] <skunkworks> just the name probably.. I have used it off and on with no issues)
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[15:46:51] <skunkworks> http://wiki.linuxcnc.org/cgi-bin/wiki.pl?Hybrid_Iso
[15:46:56] <skunkworks> oops
[15:47:12] <skunkworks> what I meant to say... http://electronicsam.com/images/KandT/testing/loading.png
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[15:52:27] <cradek> cool. I bet that's ok for a servo-thread-only system
[15:54:44] <skunkworks> sure - it is running -rt
[15:55:48] <pcw_home> what CPU
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[16:02:47] <skunkworks> http://www.newegg.com/Product/Product.aspx?Item=N82E16813128698
[16:04:34] <pcw_home> what kernel?
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[16:12:39] <skunkworks> http://electronicsam.com/images/KandT/testing/IMG_20140717_110054_019.jpg
[16:13:08] <skunkworks> I just pulled the wheezy -rt kernel from the synaptic package manager.
[16:14:55] <pcw_home> Ill check but I think I'm closer to 50 usec or so on the J1800
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[16:18:46] <skunkworks> I had the latency-test running for days - it was around 50us.. but when I started running youtube - it jumped..
[16:18:52] <pcw_home> (home built generic preemt-rt kernel)
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[16:19:10] <pcw_home> yeah this is with youtube
[16:19:35] <pcw_home> video seems to be the main source of badness
[16:19:42] <skunkworks> yes
[16:20:30] <pcw_home> plot readtime or dpll-delay-us and move the mouse around
[16:20:40] <pcw_home> (even on RTAI)
[16:22:18] <skunkworks> still totally useable.
[16:23:10] <pcw_home> Yes (and a lot of the side effects of latency noise can be worked around)
[16:23:46] <pcw_home> on the stepgen you lower the bandwidth of the correction loop
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[16:25:18] <pcw_home> for a servo I may have to add the DPLL sampled position to the quadrature encoder
[16:25:19] <pcw_home> (pretty sure the velocity estimation is unaffected by sampling jitter)
[16:25:35] <jepler> somewhere along the line I posted a patch which wakes up a certain amount early and busy-waits for the real deadline
[16:25:56] <jepler> it seemed to help the fast thread a certain amount, but harmed the slow thread (probably because it couldn't interrupt the busy-waiting fast thread)
[16:26:13] <jepler> for a single-thread system, this would probably be good
[16:26:17] <pcw_home> thats a possibility also
[16:26:26] <skunkworks> I could try it.
[16:27:22] <pcw_home> the SSI,Fanuc and BISS encoder interfaces are already triggered by the DPLL (since they need a early start)
[16:27:23] <jepler> hmm, I don't immediately find the patch.
[16:28:34] <jepler> if it turns up, I'll repost it
[16:28:39] <jepler> and retest with only a 1ms thread
[16:28:53] <jepler> does anyone know if either of those latency-graphing programs can be started in a single-thread mode?
[16:28:59] <jepler> seems like they always run with two threads
[16:30:17] <pcw_home> is there a man page
[16:32:05] <skunkworks> jepler, this? http://emergent.unpythonic.net/files/sandbox/0001-uspace-bad-idea-busy-waiting.patch
[16:34:33] <jepler> yes, probably
[16:34:48] <jepler> there's some kind of problem on my end that stopped me finding it in my list of attachments
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[16:46:44] <jepler> aha, I have too many backups of my website, and I was looking at files in the wrong backup
[16:46:59] <skunkworks> ehe
[16:47:00] <skunkworks> heh
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[17:07:05] <pcw_home> jepler: latency-histogram --nobase
[17:07:22] <pcw_home> (--help shows options)
[17:07:47] <jepler> thanks
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[19:56:34] <SkapiN> hi
[19:58:10] <SkapiN> seb_kuzminsky: i tried your deb package on kubuntu 12.04.4{PAE} (i7) , works perfect. 0 trouble (http://wiki.linuxcnc.org/cgi-bin/wiki.pl?LinuxCNC_On_Ubuntu_Precise)
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[20:02:41] <skunkworks> jepler, no real improvement there.. - creeped up to 80us..
[20:02:51] <skunkworks> (just base thread)
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[20:08:18] <skunkworks> * (just servo thread)
[20:09:01] <SkapiN> I have a hard question about LinuxCNC step generation. Perhapse someone can help me to find out some trouble. My latency is 20,000. My driver allow 10,000 as step and time. So i setup like that. I setup my computer with stepconf to use 45,000 latency jitter.
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[20:10:31] <SkapiN> i setup maxspeed just bellow calculated Freq. by linxucnc. But when i check the step generation with an external osci. i got some µdelay periodicaly (each 7-9 cycle, depending the current speed)
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[20:11:46] <SkapiN> like that : http://fboudinet.frenchdev.com/files/bad_timing . But when i change the max speed, (more than allowed speed for example) i get perfect step generation. It's kinda random, with max speed, latency and current speed value as parameters
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[20:12:21] <SkapiN> (with 25,000 and same max speed i get perfect cycle, but with less max speed i got some delay).
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[20:13:37] <SkapiN> It's not Latency issue In my opinion, because latency test tell me 20.000 with full loaded computer. LinuxCNC is okay with25K (no missing thread, motor okay etc...)
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[20:15:12] <SkapiN> any idea why linuxCNC do that ? I guess it's due to Math (round(), 32bit etc...) but it's kinda annoying with heavy CNC to have some weird µdelay sometime (but Freq is okay). Perhpase i miss something about step generation etc...
[20:15:27] <cradek> SkapiN: if you're trying to generate steps slightly less than the theoretical maximum, you will get that behavior because the output can only change or not change at each period
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[20:17:49] <SkapiN> cradek: explain a bit more, please.
[20:17:57] <SkapiN> but thanks a lot :)
[20:18:47] <SkapiN> soem confusion in my head. I mean it's bad for CNC to have this behavior. I will move a bit more/less thatn calculated
[20:18:54] <cradek> if you want 90% of your maximum possible step rate, the only way to get it is to pulse for 9 periods and then not pulse for 1 period
[20:19:32] <cradek> I don't think that follows from what you have said. Either your thinking is unclear or you have not explained what you mean well enough for me to understand
[20:20:23] <SkapiN> okay
[20:22:18] <SkapiN> cradek: for what i know, speed is calculated on high/low ratio/time., if step go up/down faster, my motor move faster. It's not based on "9 periods and then not pulse for 1 period" . I mean ALL high should stay longer for example
[20:22:31] <SkapiN> not 1 for 10 or 1 for 5 etc...
[20:23:02] <SkapiN> I think I dont have some "data" perhpase you can help me a lot to understand :)
[20:23:33] <cradek> if you are using software pulse generation, the base period is the only time the output can change. it is a periodic event whose timing is fixed.
[20:23:48] <SkapiN> I.E i have the Freq i shoudl have for the given speed. but the "cycle" is not regular/linear
[20:23:55] <cradek> every period, the only possible decision is to change or not change the output
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[20:24:19] <SkapiN> yes
[20:24:21] <SkapiN> got it
[20:24:22] <cradek> if this is inadequate, you cannot use software stepgen -- buy a mesa card and you will have wonderful smooth pulses at any speed
[20:24:34] <SkapiN> so it can be because i need 9 and 0.5 hup pulse for example
[20:25:35] <SkapiN> my issue is that the geenrated step is not "linear" so it'es not base_period issue. sicne he can "change" the pin faster but he should not (too soon)
[20:25:53] <cradek> in practice, software stepgen works OK, because drives that need very fast pulses are microstepping with them anyway, and individual microsteps have little effect on the position
[20:26:05] <SkapiN> or it's a "normal" behavior, for exmaple generate some 9.4586 HIGH front in X sec
[20:26:24] <cradek> are you having an actual observed problem with positioning, or are you just imagining that it must be there because of what you see on test equipment?
[20:26:25] <SkapiN> cradek: yes i know, i'm in 128/
[20:27:06] <SkapiN> cradek: just good equipment. i knwo perhapse it's nothing, but the behavior is not "attended"
[20:27:07] <cradek> can you turn your microstep setting down? 128 is very silly and does you no good.
[20:27:28] <cradek> like set it to 8 instead
[20:27:28] <SkapiN> yes i can but it's not driver issue
[20:27:37] <SkapiN> i check the pulse right on DB25 output
[20:27:53] <SkapiN> so we can avoid driver trouble.
[20:28:07] <cradek> but a slower rate will be much smoother because there are many base periods per pulse
[20:28:35] <SkapiN> cradek: i want a specifi rate, regardless the microsteeping
[20:28:40] <SkapiN> microstepin is after
[20:28:48] <cradek> I think you are inventing an imaginary problem?
[20:28:59] <SkapiN> i mean we need more step for same move. but step are the same
[20:29:51] <SkapiN> cradek: no. delay on stepping can be bad with high speed and heavy tools. Inerty etc...
[20:30:22] <SkapiN> but perhapse linuxcnc handle this and "smooth" the delay i dotn know
[20:30:36] <SkapiN> (sometime faster sometime slower)
[20:30:39] <cradek> if you need 1.5 out of 20 base periods to generate a pulse, you will get very low dither. if you need 19.5/20 you will get very high dither
[20:30:59] <SkapiN> yes
[20:31:11] <cradek> so you can reduce the dither by reducing your microstep setting
[20:31:59] <SkapiN> na, you are just changin the Freq.
[20:32:20] <cradek> brb
[20:32:53] <SkapiN> okay, thank you anyway cradek :)
[20:32:57] <SkapiN> really nice of you
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[21:05:20] <jepler> you might imagine some other design in which the driver calculates the amount of time to sleep, and then sleeps that long; but that becomes complicated when you have 3 or more stepgens, and it also harms activity like counting encoder pulses, where your main interest is in polling frequently enough that you don't miss any pulses.
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[21:06:59] <jepler> even the mesa hardware works on the principle of DDS to generate step pulses, but its basic time unit is on the order of 20ns instead of 20us
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[22:52:35] <PCW> skunkworks: I get 54 Usec on my J1800 (running about 4 hours now with youtube flash etc)
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[22:54:06] <PCW> skunkworks: I get 54 Usec on my J1800 running about 4 hours now with youtube flash etc (in case that was lost in the netsplit)
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