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[07:16:35] <mhaberler> cradek: around?
[07:17:14] <mhaberler> anyway.. re inverse kins only & jog
[07:17:47] <mhaberler> I checked in master; there is no inverse-only kins; a few have KINEMATICS_BOTH (need start value)
[07:18:01] <mhaberler> that does say somebody doesnt come up with one eventually
[07:18:40] <mhaberler> I have checked in the deltatau docs how they deal with the issue that fwd kins mayb be expensive (eg if an iterative solution is required)
[07:19:53] <mhaberler> what they do is call fwd kins only in a non-rt context and explicitly at program start
[07:24:41] <mhaberler> re coord jog: seems micges is adding teleop jog, the old EMCMOT_JOG_* commands seem to be intended for joint-jog only - leaving the question: fuzz EMCMOT_JOG_* for coord jog too (rather no), introduce EMCMOT_COORD_JOG_ commands, or wait to see what comes out of ja3; I need some status update what the state of affairs with new the jogging code actually is before I go about it, dont want parallel invention here
[07:26:29] <mhaberler> does say/does not say/
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[07:31:43] <mhaberler> anyway, I think the idea 'you need a fwd kins, but it need not be RT' is an interesting one for the future; I see two ways to go about that: 1. for now, do a expensive fwdkins in say a python hal module which gets triggered from motion control; 2. if motion control becomes the userland part of a user/RT dual comp it shouldnt be an issue to do it in motion control handler to start with
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[12:10:16] <alex_joni> cradek: really long string + 2 plastic cups would do the trick
[12:10:33] <alex_joni> then it's just a matter of shouting 1 or 0
[12:10:53] <archivist> half
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[14:00:29] <JT-Shop> anyone know where Axis File > Properties is calculated?
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[17:01:35] <tjtr33> cradek, hello, you mentioned a vismach for Michael to use. where can i find it?
[17:02:03] <cradek> git.linuxcnc.org/joints_axes3, sim/axis/rdelta
[17:02:06] <cradek> mhaberler: ^^
[17:02:14] <tjtr33> thx!
[17:02:26] <mhaberler> ah, ok
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[17:30:26] <andypugh> I am probably going to add a kins-supported but manual B axis to my mill.
[17:30:34] <andypugh> So I can drill slanted holes.
[17:30:58] <CaptHindsight> is that what those curved drill bits are for?
[17:32:16] <archivist> when I am rolling the blank with A the B needs to follow at an inverse and differing amount +- an offset for slot width
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[18:46:13] <tjtr33> cradek hello, how to try rdelta cfg?
[18:46:19] <tjtr33> I used "git branch --track ja3 origin/joints_axes3" then "git checkout ja3" then and make
[18:46:20] <tjtr33> I see "LINUXCNC - 2.6.0~pre joints_axes" in terminal running linuxcnc, but no sim/rdelta
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[19:34:53] <tjtr33> sudo make setuid | cd | cd linuxcnc-dev | .scripts/rip<tab> | linuxcnc now rdelta is there thx andy!
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[19:35:55] <tjtr33> no idea why i'd be so far behind 30 minutes after checkout
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[19:39:42] <tjtr33> ah well sim_rdelta.hal:1: Can't find module 'rotarydeltakins' in /home/tomp/linuxcnc-dev/rtlib Shutting down and cleaning up LinuxCNC...
[19:40:45] <tjtr33> true its not in that dir
[19:42:05] <tjtr33> src/emc/kinematics has the .c & .cc & .h files bit no .o ( was not built )
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[19:45:38] <tjtr33> must be something like make cfg to tell build about new stuff
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[19:57:43] <andypugh> Yes, did you do ./configure?
[19:57:46] <tjtr33> nope those deltakins are not getting built despite ./autogen.sh and ./configure then make ( no .o )
[19:58:05] <tjtr33> sorry i was composing ^^^ when you asked
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[19:59:24] <andypugh> You can do it by hand if you want. comp --install deltakins.c
[20:00:34] <tjtr33> ok cd src/emc/kinematics ...
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[20:00:55] <andypugh> Odd that they are not being built, they exist in the makefile
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[20:01:53] <tjtr33> comp --install rotary deltakins.c comp --install lineardeltakins.c
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[20:02:56] <tjtr33> sim_rdelta.hal:4: execv(rotarydelta): No such file or directory these names are not the names expected??
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[20:05:42] <andypugh> I am not sure. I haven't tried it
[20:06:24] <tjtr33> i had no space in the actual cmdline "tomp@lptp-1004snd:~/linuxcnc-dev/src/emc/kinematics$ comp --install rotarydeltakins.c"
[20:09:47] <andypugh> Does comp look to be succeeding?
[20:11:19] <tjtr33> yes
http://pastebin.com/Rzfnv3Ny
[20:11:30] <tjtr33> is it a name clash?
[20:13:11] <tjtr33> i got rtlib/rotarydeltaskins.ko while error is "sim_rdelta.hal:4: execv(rotarydelta): No such file or directory" note" no kins suffix
[20:13:28] <andypugh> There is a slight possibility that it is a sudo make setuid problem.
[20:13:29] <alex_joni> execv(rotarydelta) doesn't sound like a kins
[20:13:47] <alex_joni> can you post the sim_rdelta.hal ?
[20:13:49] <tjtr33> i did exec sudo make setuid
[20:14:22] * alex_joni wonders if it's not a vismach thingie missing, not the actual kins
[20:15:08] <tjtr33> http://pastebin.com/VVwb7f3Y
[20:15:44] <tjtr33> ( btw: alex, sign me up for your new BBB bob )
[20:15:56] <alex_joni> well, it seems I was partly right
[20:16:07] <alex_joni> loadusr -W rotarydelta
[20:16:09] <alex_joni> on line 4
[20:16:24] <alex_joni> that means load the non-rt executable called rotarydelta
[20:16:27] <tjtr33> ok my guess top
[20:16:30] <tjtr33> too
[20:16:46] <alex_joni> no idea what that is though.. but I bet jepler should ;)
[20:17:20] <andypugh> I think that is the Vismach model
[20:17:52] <alex_joni> tjtr33: try commenting it out, if you don't need it for now
[20:18:02] <alex_joni> tjtr33: I sent you a pm for the BBB bob
[20:18:18] <andypugh> alex_joni: Using GTL2000 ?
[20:18:24] <alex_joni> andypugh: yeah
[20:18:33] <andypugh> It's like magic isn't it?
[20:19:37] <alex_joni> sure feels like :D
[20:20:01] <tjtr33> alex, wont that stomp on all the pins listed right afterwards? rotarydelta.joint0 et al ?
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[20:21:49] <alex_joni> hmm.. you're probably right
[20:22:15] <tjtr33> hehe i was sim_rdelta.hal:23: Pin 'rotarydelta.joint0' does not exist
[20:22:44] <alex_joni> yeah, just comment out the second half
[20:23:04] <alex_joni> net pfr rotarydeltakins.platformradius # => rotarydelta.pfr
[20:24:00] <tjtr33> hey lemme ask cradek when he's about ( and mha sez it worked for him somehow )
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[20:37:17] <tjtr33> the submakefile is present and has rotarydeltakins in build list, rotarydelta.py is present
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[20:45:05] <andypugh> What happens if you try halrun / loudusr rotarydelta?
[20:45:38] <andypugh> (err, loadusr, not loud user)
[20:50:17] <tjtr33> in there now, there is no ~/linuxcnc-dev/bin/rotarydelta ( thats where the vismach should be )
[20:51:02] <tjtr33> halcmd: <stdin>:1: execv(rotarydelta): No such file or directory
[20:51:26] <tjtr33> ^^^ just halrun then loadusr rotatydelta
[20:51:42] <tjtr33> rotarydelta
[20:51:46] <andypugh> can you find the file?
[20:51:56] <tjtr33> doesnt exit afaict
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[20:53:46] <andypugh> src/hal/user_comps/vismach/rotarydelta.py
[20:53:57] <tjtr33> like i said before, the src exists and is listed in submakefile, bit doesnt get built inot the bin dir ( where all other vismach models go )
[20:54:30] <andypugh> It's a python file, you should just be able to run it.
[20:54:55] <tjtr33> tomp@lptp-1004snd:~/linuxcnc-dev$ ls src/hal/user_comps/vismach/rotarydelta.py ->> src/hal/user_comps/vismach/rotarydelta.py exists
[20:55:16] <tjtr33> just copy to bin sans .py ?
[20:55:39] <andypugh> Well, it's worth a try
[20:56:02] <andypugh> Not sure why this is all so hard though.
[20:56:17] <andypugh> I wonder if perhaps it is better to make clean then start again.
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[20:58:06] <tjtr33> yep, i forced it by copying san .py and set it executable and now it bitches ImportError: No module named rotarydeltakins
[20:58:07] <tjtr33> ( not ready for prime time )
[20:58:38] <tjtr33> i bet i could force it to work but yo're right, should not be this hacked
[20:59:06] <andypugh> pcw_home: What is the correct hex representation of a 1khz reference clock of a hm2dpll on a 6i25? I am not sure of the units of the frequency, or of the clocklow (for example)
[20:59:12] <tjtr33> off to clean up this munged system now
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[21:01:22] <tjtr33> woops, hey thank you andy
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[21:09:31] <jepler> 6a281a6 rtapi_math: fix isfinite implementation for pre-4.4 gcc
[21:09:55] <jepler> when I am this commit (tip of ja3) I can run rdelta and ldelta sample configs
[21:10:35] <jepler> I didn't have to do anything tricky
[21:10:49] <jepler> I did run into an unrelated problem that I mailed the list about, which is why I wasn't saying anything back when it was .. more relevant
[21:10:52] <jepler> bbl
[21:11:30] <pcw_home> clocklow is in integer Hz
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[21:12:30] <pcw_home> BaseRateDDS := round(TwoToThe42*((BaseRate)/(DPLLBaseClock/PreScale)));
[21:13:05] <pcw_home> base rate being 1000 for a 1 KHz servo thread
[21:15:32] <andypugh> pcw_home: Yes, I have that in the regmap. What I am unclear on is frequency or time, and the units used.
[21:16:09] <pcw_home> all frequency and in hz
[21:16:41] <andypugh> Initially the DPLL appears to be triggering every 33 seconds. Which is a bit slow :-)
[21:18:51] <andypugh> Did you have any lucj with the Fanuc? Did you notice that I pushed a new version of the branch?
[21:18:51] <pcw_home> I didnt have a chance to try your fix yet (fanuc encoders etc are at work)
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[21:20:43] <pcw_home> 33 seconds is pretty close to 32768*1/1000
[21:21:35] <andypugh> Dmesg says that the HM2DPLL Timer 1 pin is on P2-12. The Manual says P2-12 is a Gnd... Who is right?
[21:22:18] <jepler> I'd bet on the manual
[21:22:20] <mhaberler> jepler: stunning analysis.. didnt even think of static members default dtors
[21:22:30] <jepler> mhaberler: ain't C++ grand!
[21:22:51] <jepler> it's in the class of "obvious in retrospect" weird crashing bugs
[21:23:00] <pcw_home> both (after the hdr26 transitions to a DB25)
[21:23:01] <mhaberler> yeah, right ;)
[21:23:08] <jepler> now the challenge is to do better than my so-called "fix"
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[21:23:45] <pcw_home> manual has hdr pins dmesg has DB25 pins
[21:23:51] <mhaberler> what about dumping the static members and make that a proper class - the dtor could do it in proper sequence
[21:23:59] <mhaberler> my gut feeling is you're right
[21:24:11] <mhaberler> that pythis dtor is the issue
[21:24:42] <mhaberler> it is a one time effort - explicit member initialisation
[21:24:56] <mhaberler> but we get multiple instances per address space for freee
[21:25:17] <mhaberler> (for a given amount of hours counted as 'free')
[21:25:52] <mhaberler> that would give controlled sequencing of the dtor and maybe even make it debuggable
[21:26:11] <jepler> I don't know what happens when you take the "static" off of that declaration
[21:26:17] <jepler> I assume it doesn't build anymore
[21:26:28] <mhaberler> you loose default initialisation, that is all
[21:26:53] <mhaberler> that moves to the ctor and a humungous initializer list
[21:27:13] <mhaberler> I think it was convenience - in particular interp_arrays.cc
[21:27:32] <pcw_home> so DDS for 1 KHz ia 0x7DD4414.A70C774DC167F6D4C (0x7DD4415)
[21:27:33] <pcw_home> if prescale is one
[21:28:08] <mhaberler> but the dtor would delete pythis last thing and then it shouldnt matter anymore
[21:28:12] <pcw_home> is (assuming 33.333 MHz clocklow)
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[21:28:50] <mhaberler> just removing the static kwd will make the initializer statements in interp_array.cc fail to compile
[21:29:21] <jepler> and interpmodule is quite grumpy
[21:29:34] <mhaberler> grumpy..
[21:30:23] <mhaberler> meaning hard to understand or adapt? (yes and yes)
[21:30:57] <jepler> /usr/src/linuxcnc-rotarydelta/src/emc/rs274ngc/rs274ngc_interp.hh|628 col 9| error: invalid use of non-static data member ‘Interp::_setup’
[21:31:00] <jepler> /usr/src/linuxcnc-rotarydelta/src/emc/rs274ngc/interpmodule.cc|274 col 40| error: from this location
[21:31:06] <jepler> .def_readwrite("stack_index", Interp::_setup.stack_index) // error stack pointer, beyond last entry
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[21:32:09] <jepler> and so on for every Interp::_setup use
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[21:32:30] <mhaberler> post the change you did? let me try that here
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[21:33:08] <jepler> no, trying to remove the 'static' from _setup
[21:34:58] <jepler> hold on, I had a stray & left
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[21:35:12] <jepler> no that's not it
[21:35:17] <cradek> what are you guys talking about?
[21:35:25] <jepler> how do you form a pointer-to-member-of-nested-struct?
[21:35:52] <jepler> > Yes, it is forbidden. You are not the first to come up with this perfectly logical idea. In my opinion this is one of the obvious "bugs"/"omissions" in the specification of pointers-to-members in C++, but apparently the committee has no interest in developing the specification of pointers-to-members any further (as is the case with most of the "low-level" language features).
[21:35:58] <jepler> http://stackoverflow.com/questions/1929887/is-pointer-to-inner-struct-member-forbidden
[21:36:10] <jepler> so .. interpmodule will unfortunately need a thorough reaming :-/
[21:39:00] <mhaberler> anything other than POD arrays is straightforward to adapt
[21:39:18] <mhaberler> fixed size arrays are hell to expose in python
[21:39:41] <mhaberler> templates 'r us
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[21:40:34] <mhaberler> but at the time I was afraid of changing this to vector
[21:45:36] <jepler> none of the .def_readwrites that refer to Interp::_seutp are arrays
[21:45:36] <mhaberler> meaning it should be straightforward (ha)
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[21:48:21] <mhaberler> did you include interp_internal.hh in rs274_interp.hh to get it to compile?
[21:50:10] <jepler> yes
[21:50:17] <jepler> which is also unfortunate
[21:54:09] <jepler> well anyway I think for each of those properties you "just" need to write an explicit getter and an explicit setter and refer to them in an .add_property
[21:54:29] <mhaberler> the _setup members will need thin wrappers - noisy but trivial
[21:54:37] <mhaberler> right
[21:55:27] <mhaberler> anyway, I think it's rather the question how to proceed on this; I would actually prefer to take the opportunity to get rid of static members
[21:55:39] <jepler> the way you have talked before about the trouble static _setup causes for you, I had assumed the problem with getting rid of it ran deep
[21:55:43] <jepler> it's in comparatively new code though
[21:56:03] <jepler> interpmodule is not in 2.5, right?
[21:56:20] <mhaberler> no, master only - it's about 18 months there
[21:56:50] <jepler> OK
[21:57:10] <mhaberler> lots of suprises for 2.5 addicts in master ;)
[21:57:19] <jepler> as long as it doesn't have to be fixed in 2.5 by such an invasive change
[21:57:30] <mhaberler> no
[21:58:46] <jepler> can you observe the crash before changing anything?
[21:58:50] <mhaberler> it would be good to know beforehand if dtor sequencing (ie pythis last) actually fixes the problem
[21:58:59] <jepler> I haven't looked at what the lifetime of Interp objects is; if they are collected after exit() then the same problem will exist
[21:59:05] <mhaberler> you mean an axis segfault during shutdown?
[21:59:09] <jepler> yes
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[21:59:40] <jepler> Py_Finalize will be called before exit() and the destructors of global data will be after exit()
[21:59:42] <mhaberler> I have heard of it; I might have seen it
[21:59:56] <mhaberler> aja
[21:59:58] <jepler> well make sure you see it, so you can be confident it's fixed post your changes
[22:00:20] <jepler> I worry because I didn't look at all the Interps we declare, I bet some of them are global so you're back to the same problem
[22:00:31] <mhaberler> static ctors/dtors are a stupidity which should be wiped
[22:00:39] <jepler>
[22:00:39] <jepler> int Py_IsInitialized()
[22:00:39] <jepler> Return true (nonzero) when the Python interpreter has been initialized, false (zero) if not. After Py_Finalize() is called, this returns false until Py_Initialize() is called again.
[22:01:04] <jepler> you can write magic in the destructor of setup: if !Py_IsInitialized() { silently discard the reference, if boost::python lets you }
[22:01:14] <mhaberler> right
[22:01:25] <mhaberler> not sure it will
[22:01:52] <mhaberler> but I was there before; the fix was a wrapper which redefines the dtor for that pointer
[22:01:59] <mhaberler> let me see
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[22:05:35] <jepler> Py_INCREF(pythis.ptr());
[22:05:48] <jepler> this would be the hacky way to do it: by incrementing the reference count, you force it to leak
[22:06:26] <jepler> but we're tring to be free of hacks here :-/
[22:07:04] <jepler> new(&pythis) bp::object(NULL);
[22:07:06] <jepler> but we're tring to be free of hacks here :-/
[22:07:13] <jepler> OK, I'm going to stop and leave you to decide what's best.
[22:09:32] <mhaberler> ha
[22:11:52] <mhaberler> does the crash go away if you do a Py_INCREF(pythis.ptr()) ?
[22:12:29] <mhaberler> and - what config did you get the crash with ?
[22:13:50] <mhaberler> what puzzles me is that the pythis dtor should only delete the wrapper class instance, not the interp instance (was this avtually the problem?)
[22:14:21] <jepler> I was in ja3 running configs/sim/axis/rdelta.ini
[22:14:29] <jepler> just start and then close axis after a few seconds
[22:14:41] <mhaberler> g.l.o:joint_axes3 ?
[22:14:51] <jepler> right
[22:15:02] <mhaberler> that is based on master?
[22:15:11] <jepler> master has been merged into it fairly recently
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[22:16:05] <mhaberler> oh, July, I see
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[22:16:15] <jepler> I didn't actually try on master branch
[22:16:25] <mhaberler> should be the same for that problem
[22:16:40] <jepler> that was what I thought, if my diagnosis was accurate
[22:16:51] <tjtr33> andypugh, make clean; make; sudo make setuid all good now got the vismach up thanks
[22:18:12] <mhaberler> 'close axis' meanin delete window or File->Quit?
[22:18:13] <jepler> running --enable-simulator but again it shouldn't be relevant
[22:18:23] <jepler> window manager close action (alt-f4) is what I did
[22:18:32] <jepler> should do the same thing as file>quit
[22:18:44] <jepler> I sort of think that maybe this started affecting me when I upgraded to debian unstable
[22:18:51] <jepler> that's why I wanted to be sure you would see it
[22:19:00] <jepler> anyway, terminal prints that axis crashed and it's logged in dmesg..
[22:19:11] <jepler> [526616.119200] axis[6119]: segfault at 98 ip 000000000046d598 sp 00007fffa9803f90 error 6 in python2.7[400000+23a000]
[22:19:47] <mhaberler> I get none on 10.04 with boost 1.40, python 2.6.5
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[22:20:27] <mhaberler> gut feeling: boost version - what do you have?
[22:21:09] <jepler> libboost-python-dev 1.40.0.1
[22:21:29] <jepler> errrrr
[22:21:31] <jepler> that's a lie, hold on
[22:21:32] <jepler> (wrong system)
[22:21:40] <jepler> 1.49.0.1
[22:22:58] <mhaberler> I have a wheezy vm with python 2.7.3 and boost 1.49.0-3, that might do
[22:23:01] <jepler> so yeah, it could be a boost::python difference too
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[22:32:18] <mhaberler> I dont get that segfault on that wheezy platform, sim build of joints_axes3
[22:33:32] <mhaberler> gcc version is 4.7.2-5
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[22:48:19] <mhaberler> well I dont know how to reproduce this one; last option is a non-VM;)
[22:49:09] <mhaberler> x86 or amd64?
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[22:53:50] <jepler> oh amd64
[22:54:08] <jepler> if you have something you want me to test, let me know
[22:54:28] <jepler> it happens at least 50% of the time for me, maybe more; with my initial "fix" it happened 0 in 10 times
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[22:59:29] <mhaberler> ok, will try on amd64
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[23:12:26] <mhaberler> amd64/wheezy: nada
[23:16:55] <mhaberler> 20 runs - nothing, both x86/10.04, amd64/wheezy
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[23:23:49] <jepler> I guess only jessie shows it then
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