Back
[01:35:10] <jmkasunich> cradek: you around?
[01:35:26] <cradek> yes
[01:35:44] <jmkasunich> when milling a board, how comfortable are you running traces between DIP pins?
[01:35:54] <cradek> totally
[01:36:06] <jmkasunich> how wide do you make those traces?
[01:36:23] <cradek> 10 mil?
[01:36:52] <jmkasunich> that explains it
[01:37:00] <jmkasunich> these traces looked to big to fit thru
[01:37:13] <jmkasunich> skunkworks has it set to 16 mil
[01:37:19] <cradek> yeah that's too wide
[01:37:25] <cradek> might be able to squeeze 12 through there
[01:38:01] <cradek> separations are about 9, so that leaves 70 for the pad if my math is right
[01:38:08] <SWPadnos> you should be able to get a 20 mil trace through there, with 10 mil spacing (assuming a 60 mil pad, which I think is standard for 0.1" DIP packages)
[01:38:52] <cradek> SWPadnos: what's the dip hole size then? 30?
[01:39:05] <SWPadnos> I think so - maybe even 38
[01:39:09] <SWPadnos> lemme check
[01:39:26] <jmkasunich> these pads look to be less than 60 wide
[01:39:33] <jmkasunich> 55 maybe?
[01:39:54] <SWPadnos> I think they should be 60. I'll look at a package in Altium
[01:40:29] <cradek> I think eagle sets their width according to the hole size
[01:41:03] <cradek> width = hole + 2*restring
[01:41:31] <jmkasunich> I forgot how big thru hole parts are
[01:41:39] <cradek> yeah they're big
[01:41:41] <jmkasunich> I want my 1206's!
[01:41:57] <cradek> I've milled two traces between dip pads but it's a little hairy and it doesn't seem to help eagle's autorouter much
[01:42:12] <jmkasunich> autorouter! what the heck is that?
[01:42:18] <cradek> mostly a parlor trick
[01:42:44] <cradek> you guys both saw the lxr setup right?
[01:42:45] <jmkasunich> dang - I miss having vias
[01:42:48] <jmkasunich> yeah
[01:43:03] <SWPadnos> the lxr stuff looks great
[01:43:03] <cradek> vias can still be soldered
[01:43:09] <cradek> thanks
[01:43:38] <cradek> oops I never wrote the crontabs to keep it up to date
[01:43:42] <jmkasunich> I wish skunkworks hadn't used a whole 4049 to get two inverters
[01:44:18] <cradek> yeah that's a 19c part wasted
[01:44:30] <jmkasunich> thats a half a square inch wasted
[01:45:17] <jmkasunich> can you mill two 16 mill traces on 25 mill centers? (9 mill spacing)
[01:45:42] <jmkasunich> duh "separations are about 9"
[01:45:45] <cradek> yes with care you can get 9 separations
[01:45:46] <jmkasunich> I guess that means yes
[01:45:59] <cradek> if there's room for 11 or 12 you can be much less careful
[01:46:04] <jmkasunich> 12 mill traces on 25 mill centers is probalby better
[01:46:15] <jmkasunich> I like a 25 mill grid
[01:46:20] <cradek> it's what you might get anyway :-)
[01:46:22] <jmkasunich> at work I do 12 mil lines
[01:46:38] <jmkasunich> I just haven't figured out how to change linewidth yet
[01:46:53] <jmkasunich> and I'd want to do it across the board - I hate having a mix of widths
[01:46:53] <cradek> 'change width'
[01:47:01] <cradek> group first then
[01:47:32] <SWPadnos> it looks like 60 mil pads and 35 mil holes are standard for DIP packages
[01:47:56] <jmkasunich> how do I change the default width?
[01:48:20] <cradek> when you are in route, set it with a pulldown thingy that appears
[01:48:50] <jmkasunich> found it, thanks
[01:48:58] <jmkasunich> this user interface takes some getting used to
[01:50:13] <cradek> if that's code language for "it's not very good" I agree
[01:50:34] <cradek> after learning it though, I can be effective with the program
[01:52:24] <jmkasunich> I hope he doesn't want to get this board UL listed ;-)
[01:52:54] <jmkasunich> 88 mill spacings are somewhat marginal for 200V
[01:53:00] <jmkasunich> keep it clean
[02:45:26] <jepler> you can change the values selected by the design-rule checker in the "drc" and "class" commands, as well
[02:49:28] <jepler> so the definitive documentation for halcmd is supposed to be the manpage?
[02:51:03] <jepler> it hurts that there are three bad copies of the documentation (in the running halcmd, in the manpage, and in hal/tools.lyx)
[02:55:45] <jmkasunich> ouch
[02:56:10] <jmkasunich> yeah, that has been on my list of nagging ugly things
[02:56:46] <jmkasunich> it seems like one of them ought to be the definitive one, and the others autogenerated from that one
[02:57:14] <jmkasunich> is the online help even that usefull?
[02:57:31] <jmkasunich> most unix programs don't have much of that - they expect you to read the manpage
[02:58:27] <jmkasunich> board layout done..
[02:58:39] <jmkasunich> how do I let myself get sucked into doing these things?
[02:59:05] <cradek> well I'm thrilled you know Eagle well enough to layout my boards now :-)
[02:59:19] <jmkasunich> only if your boards are interesting
[02:59:26] <jmkasunich> (like a 20A 200V H bridge)
[03:00:03] <jmkasunich> now I have to figure out how to get the files to skunkworks
[03:02:12] <jmkasunich> when you are milling a board, do you do a flood in eagle to show all the unmilled copper?
[03:02:27] <cradek> usually
[03:02:33] <jmkasunich> hmm, I just realized something
[03:02:39] <jmkasunich> how do you mill really wide spaces?
[03:02:47] <cradek> an end mill
[03:03:35] <cradek> http://timeguy.com/cradek-files/cnc/pcb/stepdriver2.jpg
[03:03:47] <jepler> the usual g-code program generated from eagle with my script leaves a lot of unmilled copper, it doesn't clear out all it can.
[03:04:05] <jepler> cradek: that must have been with 2 or 3 endmill passes?
[03:04:16] <cradek> I don't remember, but probably
[03:04:23] <cradek> it doesn't take many at 1/16 at a time
[03:05:16] <jmkasunich> posting a screencap - stand by
[03:06:30] <jmkasunich> http://home.att.net/~jmkasunich/Pics/hbridge.png
[03:06:50] <jmkasunich> wtf?
[03:07:03] <cradek> that's not quite right...
[03:07:03] <jmkasunich> ok, lemme do that again
[03:07:10] <cradek> turn off grid
[03:07:35] <jepler> there's also an 'export' command that can do png..
[03:07:39] <jmkasunich> I like having a grid - I changed it to 0.1
[03:08:56] <jmkasunich> refresh it
[03:09:10] <jmkasunich> dang - the floods turned off
[03:10:14] <cradek> pin1 of ic2 is unrouted
[03:10:24] <jmkasunich> oops
[03:10:28] <cradek> looks like a trivial route though
[03:10:49] <jmkasunich> yeah, it was routed, and I disconnected it when I wanted to move the bypass cap
[03:11:24] <jepler> what are pads 4 and 5 for?
[03:13:01] <jmkasunich> the DC bus cap
[03:13:10] <cradek> cool
[03:13:11] <jmkasunich> large screw-terminal can
[03:14:26] <jmkasunich> there, better
[03:14:43] <jmkasunich> turned off the restrict layers, so the floods look better
[03:15:10] <cradek> that looks very nice
[03:15:29] <jmkasunich> skunkworks didn't hook anything to the input side of the optocoupler - I hope I left enough space for a connector or whatnot
[03:15:59] <jmkasunich> the upper blue flood is +bus, and the two red floods are the motor terminals
[03:16:09] <jmkasunich> so they need good clearance from the low level stuff
[03:16:45] <jmkasunich> that should be an ultra-low inducance layout
[03:17:53] <jepler> PAD3 is for the unregulated logic supply voltage?
[03:18:01] <jmkasunich> yeah
[03:18:47] <jmkasunich> I wonder what max input volts for the regulator is?
[03:19:01] <jmkasunich> the current shouldn't be to high, probably 50mA or less...
[03:19:19] <jmkasunich> I wonder if a dropping resistor and a zener could be used to get the gate power from the bus
[03:19:37] <jepler> if BUS is 200V? yuck.
[03:19:41] <jmkasunich> yeah
[03:19:48] <cradek> I bet 50mA is way too high then
[03:19:51] <jmkasunich> gotta burn something liek 10W
[03:20:14] <jmkasunich> heh, I know
[03:20:25] <jmkasunich> _if_ the current is low enough
[03:20:40] <jmkasunich> a 500K resistor from bus to the top of a 18V zener
[03:21:08] <jmkasunich> a 200V mosfet with the gate connected to the top of the zener, the drain connected to +bus, and the source connected to the +15V rail
[03:23:59] <jmkasunich> how did it get to be 11:30?
[03:24:27] <cradek> routing PCBs will do that
[03:28:32] <jmkasunich> yeah, especially when you are climbing the learning curve
[03:37:45] <cradek> jepler: I indexed the whole source now
[03:41:22] <jmkasunich> the laptop's gonna blow a circuit
[03:58:50] <cradek> if it does the indexing at night, it doesn't matter
[03:59:02] <cradek> if it's too slow to use maybe someone will donate a (small, quiet) machine
[03:59:19] <cradek> it would be easy to move the install to another box
[04:05:22] <jmkasunich> the trick is the small quiet part
[04:05:51] <cradek> yeah
[04:06:16] <cradek> if I were doing it I'd buy one of these e-pc boxes
[04:06:27] <cradek> they come as PIII-1000
[04:06:38] <jmkasunich> and under $100?
[04:06:43] <jmkasunich> do they have pci slots?
[04:06:45] <cradek> hard to say
[04:06:47] <cradek> no slots
[04:07:34] <cradek> one full size hard disk, no slots, no floppy
[04:07:50] <jmkasunich> so fine for the cvs server, not so good for an EMC machine
[04:08:02] <cradek> yeah
[04:08:04] <jmkasunich> (assuming I want better than software step/dir)
[04:08:07] <cradek> fine for a parport machine actually
[04:08:43] <jmkasunich> even though its onboard video they don't have latency issues?
[04:08:54] <cradek> this one I tested seems to be fine
[04:09:06] <cradek> if you're interested I'll test it more
[04:09:37] <jmkasunich> not that interested
[04:09:39] <cradek> yes it looks like lots of them go for < $100 on ebay
[04:09:50] <jmkasunich> I have dozens of things I _should_ be doing
[04:09:52] <cradek> 866 .. 1000 MHz
[04:09:56] <jmkasunich> like putting the lathe back to gether
[05:00:16] <jmkasunich> lathe is together and works!
[13:10:02] <alex_joni> morning all
[13:41:25] <jepler> cradek: great, thanks for doing that
[13:45:01] <alex_joni> hi jeff
[13:50:24] <jepler> hi ale
[13:50:25] <jepler> x
[13:59:28] <skunkworks> jmkasunich: wow. work of art.
[14:03:22] <alex_joni> jepler: got 5 minutes?
[14:06:38] <alex_joni> * alex_joni is trying to make vim work with tags
[14:08:00] <skunkworks> jmkasunich: c1,c2 where just some 500v .1uf I had found.
[14:17:00] <alex_joni> jepler: nm, figured it out (ctags -R, then instruct vim to use it)
[14:20:56] <alex_joni> jepler: I know this info is somewhere, but I can't find how to tell vim to use the default .vimrc from emc2/src and to load the tags file by default (emc2/src/tags)
[14:28:33] <jepler> alex_joni: sorry, I was messing with suspend/hibernate and made my machine unusable
[14:28:42] <SWPadnos> heh
[14:28:58] <alex_joni> jepler: common mistake :)
[14:29:25] <alex_joni> jepler: do you always open files relatively to emc2/src ?
[14:29:36] <alex_joni> e.g. vim emc/nml_intf/emc.hh ?
[14:29:41] <jepler> alex_joni: yes, I start in emc2/src
[14:29:48] <jepler> then I might type :tag emc.hh to get to that file
[14:29:50] <alex_joni> ok, that makes sense
[14:30:10] <alex_joni> I noticed there's also a :make
[14:30:11] <jepler> if you change to the directory with the file you want, some things don't work as well
[14:30:22] <alex_joni> which also works only from emc2/src
[14:30:28] <jepler> yep
[14:31:02] <alex_joni> hmm.. remember the ctags incantation you did?
[14:31:06] <jepler> :make tags
[14:31:28] <jepler> oh that reminds me there was one thing I wanted to fix about the 'tags' target...
[14:36:51] <jepler> hm I can't get it to do what I want: not believe that EXPORT_SYMBOL(xxx); is a declaration of xxx
[14:37:16] <SWPadnos> what is "it" in that sentence?
[14:37:22] <jepler> "it" is ctags-exuberant
[14:37:25] <SWPadnos> ah
[14:39:34] <jepler> aha, figured it out.
[14:41:17] <jepler> yay, that was really bugging me
[14:49:34] <SWPadnos> hmm - don't the RTAPI_MP_* macros actually declare variables?
[14:54:29] <SWPadnos> nevermind. duh me
[15:02:30] <alex_joni> bbl..
[15:03:03] <alex_joni> SWPadnos: something to play with
http://www.nocircles.com/index.php?boyhave=flash
[15:39:59] <jmkasunich> skunkworks: we need to figure out how to get the files to you
[15:40:10] <jmkasunich> btw, the caps don't need to be 500V
[15:40:38] <jmkasunich> 0.1uF 50V for the bypasses (you'll note I added more - one for each driver, high and low side, and one on the regulator input)
[15:41:07] <jmkasunich> I also added electrolytic caps for the high side drivers - those should be about 10-22uF at 25-35V
[15:41:37] <skunkworks> you can just email it. samcoinc@gmail.com
[15:42:12] <jmkasunich> ok
[15:42:25] <jmkasunich> I was wondering because you didn't want to mail the originals to me
[15:42:50] <skunkworks> so the bootstrap caps don't have to be the supply voltage? I had it wrong in my head then.
[15:43:04] <jmkasunich> nope, they only see the 15V
[15:43:10] <skunkworks> duh
[15:43:12] <jmkasunich> the bootstrap diodes do see the full voltage
[15:44:02] <skunkworks> the circuit looks awsome. what do you think of eagle?
[15:44:21] <skunkworks> (what do you use at work?)
[15:44:29] <jmkasunich> it takes some getting used to
[15:44:43] <jmkasunich> power-pcb (boards) and power-logic (schematic) from Pads
[15:45:03] <jmkasunich> C5 and C6 are the lytics
[15:45:14] <jmkasunich> the rest are 0.1uF 50V ceramics
[15:45:43] <jmkasunich> I couldn't find a decent symbol for them tho, usually they look about like a 1/4 w resistor
[15:45:57] <skunkworks> thank you. I think I may be able to mill this today - complete with your signature :)
[15:46:06] <skunkworks> right
[15:46:16] <jmkasunich> I assumed that IC4 is an optocoupler - you need to add a connector and maybe some resistors for the input of that
[15:46:27] <skunkworks> I have a heck of a time finding packages I need.
[15:46:53] <skunkworks> It looks like there will be more than enough room for resisters and pads.
[15:46:56] <jmkasunich> one other thing I thought of after I finished - it would be a good idea to have a lytic on the main +15V line
[15:47:10] <jmkasunich> same as the bootstrap ones - 10-47uF, 25-35V
[15:47:19] <jmkasunich> gonna be a tight squeeze tho
[15:47:22] <skunkworks> ok
[15:47:39] <skunkworks> it looks a lot less packed in there then what I was doing.
[15:47:47] <jmkasunich> hmm, if you stand the regulator up instead of laying it down that will make room
[15:48:35] <skunkworks> yah - they only had a packagee laying down. I wasn't going to. just didn't redraw the package.
[15:49:05] <skunkworks> cheap and dirty I was just going to change it to a 220 pacage that was standing up.
[15:49:31] <jmkasunich> that works
[15:49:32] <skunkworks> the email thing - I just didn't want you to have to post yours.
[15:49:52] <jmkasunich> could have exchanged mails in a /msg
[15:50:00] <jmkasunich> (you didn't have to post yours either)
[15:50:10] <jmkasunich> is your IRC nick registered?
[15:50:19] <skunkworks> actually I think I have your email
[15:50:43] <skunkworks> you sent me a message when you and cradek where figureing out the >1gb issue
[15:52:47] <jmkasunich> btw, the initials is something I do on most boards that I design
[15:53:03] <jmkasunich> they don't call it PCB "artwork" for nothing - I sign the ones I'm happy with
[15:53:15] <skunkworks> :)
[15:53:16] <jmkasunich> when my boss makes me make compromises that I don't like, I don't sign it
[15:53:33] <skunkworks> funny.
[15:53:57] <skunkworks> has the compromises ever bit him in the a$$?
[15:54:04] <skunkworks> have
[15:54:06] <jmkasunich> sometimes
[15:55:00] <jmkasunich> the voltage clearances on this board are probably marginal for 200V
[15:55:32] <jmkasunich> (for example, between the heavy power trace going to one pin of a FET, and the pad of the adjacent FET pin
[15:55:48] <jmkasunich> keep the board clean and it should be ok
[15:56:00] <jmkasunich> but you'll not be getting it UL approved ;-)
[15:56:18] <jmkasunich> they have rather strict creepage and clearance specs
[15:56:22] <skunkworks> I am not worried. I read that comment from you earlier :)
[15:56:51] <jmkasunich> otoh, I'm used to working with 480V stuff, 700V DC bus... I really don't know what the requirements are for 200V
[15:58:05] <jmkasunich> another possibility to improve the clearance (but I don't know how to do it in eagle) is to turn off the top side pad for a FET pin that connected on the bottom (and close to a top side trace)
[15:58:21] <jmkasunich> then the clearance is trace to pin, instead of trace to pad
[15:58:30] <jepler> I don't think eagle can turn off the pad on one side of the board
[15:58:40] <jmkasunich> ok, so much for that ides
[15:58:43] <jmkasunich> idea
[15:58:56] <jmkasunich> IIRC, power-pcb can do it, but its not simple
[15:59:11] <jmkasunich> I really don't think its neccessary anyway
[16:00:07] <jmkasunich> you might want to delete pad1 and pad2 and just connect the power leads at the cap screws
[16:01:43] <skunkworks> Good idea.
[16:02:44] <skunkworks> I see you connected all the inputs to ground of the 4049. Thank you :)
[16:04:58] <skunkworks> I would not have thought about setting one to +v if that worked the best.
[16:05:08] <jmkasunich> I'm lazy about routing
[16:05:08] <skunkworks> location wize.
[16:08:28] <jmkasunich> well, I think I'm gonna go poke some holes in paper - its a beautiful day, maybe one of the last pretty weekend days we'll see this year
[16:08:38] <jmkasunich> back in a few hours
[16:08:53] <jmkasunich> (wish the range wasn't an hour drive each way)
[16:09:49] <skunkworks> thanks again. -- have fun
[17:04:13] <Lerneaen_Hydra_> Lerneaen_Hydra_ is now known as Lerneaen_Hydra
[20:32:40] <alex_joni> quiet day today
[23:06:56] <jmkasunich> * jmkasunich is back
[23:07:04] <alex_joni> hi
[23:07:12] <alex_joni> shot anyone?
[23:07:18] <jmkasunich> only paper
[23:07:53] <alex_joni> good :)
[23:08:00] <jmkasunich> did get hit on the side of the neck by an empty .22 casing ejected from a rifle next to me (stung a bit)
[23:08:30] <alex_joni> ouch :)
[23:08:46] <alex_joni> jmkasunich: you know you're switching (current)
[23:08:55] <jmkasunich> huh?
[23:09:04] <alex_joni> would it pay off to get a line-interactive sine-wave UPS vs. a dumb one?
[23:09:19] <jmkasunich> I don't know much about UPSs
[23:09:38] <jmkasunich> for instance, I would have to google to find out what "line-interactive" means
[23:09:39] <alex_joni> line interactive always run on battery + inverter
[23:09:53] <alex_joni> if there's mains it also recharges the battery
[23:10:07] <jmkasunich> instead of running straight mains power and switching over to inverter on a mains fail
[23:10:11] <alex_joni> the "dumb" type runs on mains, unless there's a failure, then it switches
[23:10:15] <alex_joni> yeah
[23:10:34] <jmkasunich> seems like line-interactive would be better for very sensitive stuff that can't tolerate a momentary dropout for transfer
[23:10:39] <alex_joni> the advantage is that it regulates input power too (line interactive)
[23:10:49] <jmkasunich> also better if your line is messy
[23:10:59] <jmkasunich> right - cleans up a bad line
[23:11:11] <alex_joni> but it's 50 vs. 500$
[23:11:21] <jmkasunich> otoh, if the inverter is running all the time, it will probably wear out sooner
[23:11:37] <jmkasunich> (unless its build a lot better, maybe thats why the $500)
[23:11:41] <alex_joni> battery life is 3-4 years
[23:11:55] <alex_joni> so inverter might last a bit more :D
[23:12:04] <alex_joni> the 500$ is sine-wave output
[23:12:12] <alex_joni> the other is rectangular switching
[23:12:24] <jmkasunich> rect doesn't thrill me
[23:12:30] <jmkasunich> but I guess it depends on the load
[23:12:39] <alex_joni> PC PSU's
[23:12:49] <jmkasunich> computer loads are diode bridges, which means they only conduct on the peak of the sine anyway
[23:14:40] <alex_joni> ok..
[23:22:13] <skunkworks> jmkasunich: milling now. 2nd one. the traces and pads where just too small. I make them bigger. (for the resisters/cap pads)
[23:22:30] <skunkworks> so far so good.
[23:23:38] <jmkasunich> I probably shouldn't have switched from 16 mill to 12 mill traces
[23:25:22] <skunkworks> I made all the traces .032
[23:25:26] <skunkworks> signal
[23:28:10] <jmkasunich> thats big
[23:34:13] <skunkworks> I like big :)
[23:34:55] <skunkworks> and seen as how we didn't have to run any between the ic pads - I don't see a reason to have them that small. For a diyer
[23:35:07] <skunkworks> and in we I mean you :)
[23:35:31] <skunkworks> top is milled - bottom is milling
