#emc-devel | Logs for 2006-08-16

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[13:15:32] <jepler> looking at this PCI board mentioned by 'ihatewincnc' last night, it seems there's some facility to write a waveform to RAM (or to a small on-board FIFO) which is clocked out at a set rate.
[13:17:11] <jepler> if the 1ms servo thread could calculate 1000 iterations of the step waveform and put them in a memory buffer, the board could clock them out at 1 per uS, giving a very nice waveform
[13:17:38] <alex_joni> sure sounds like quite a job
[13:17:43] <alex_joni> modifying stepgen
[13:18:50] <jepler> yeah---I think you'd have to integrate the board driver with the waveform generator, losing flexibility in the process
[13:21:04] <jepler> if one of these boards fell into my hands I'd try to write it
[13:21:16] <alex_joni> heh :)
[13:21:35] <alex_joni> you need a good scope
[13:21:38] <alex_joni> with logging
[13:22:51] <alex_joni> cool.. my AtMega is displaying date & time on the LCD
[13:22:56] <jepler> the board sounds like it would make a decent logic scope, for signals up to 2MHz or so
[13:23:17] <jepler> I mean, for sampling rates up to 2MHz
[13:25:11] <alex_joni> * alex_joni runs home..
[13:25:14] <alex_joni> later everyone
[13:25:22] <SWPadnos> see ya Alex
[13:26:38] <SWPadnos> jepler - maybe the thig to do with one of those boards is to put several waveforms into it (if possible), and just vary the update rate
[13:26:51] <SWPadnos> if it can be done on different channels independently
[13:27:18] <jepler> SWPadnos: it looks like there's only one "out" channel
[13:27:46] <SWPadnos> oh - a single 32-bit in and a single 32-bit out register?
[13:27:50] <jepler> yes
[13:27:56] <SWPadnos> nevermind ;)
[13:28:45] <jepler> one timer for the input, one timer for the output, and one that can be used as an additional timer prescaler
[13:29:00] <SWPadnos> that card would be better for stepgen anyway, sice it's PCI, and uses a single DWORD address, instead of several byte addresses on ISA
[13:29:02] <SWPadnos> ok
[13:29:26] <jepler> yeah, the good side is that you can set all 32 output bits with a single I/O
[13:29:54] <SWPadnos> and PCI runs at 33 Mz, so the I/O should post faster than 1 uS
[13:29:58] <SWPadnos> MHz, that is
[13:31:57] <jepler> yeah though I'm not sure that buys you a lot -- one parport is only 2 outs and one in, so what if it takes you from 20uS to 17uS...
[13:33:25] <SWPadnos> true. and you don't even have to wait for the last one to finish
[13:33:51] <SWPadnos> but Alex might be able to get to 5 uS instead of 6 on his Athlon system ;)
[13:47:25] <Lerneaen_Hydra> 6┬Ás? that fast?
[13:53:42] <SWPadnos> yeah - he was just seeing how fast he could go. I'm not sure he had anything in the base thread, but the machine didn't crash :)
[18:53:12] <alex_joni> SWPadnos: it was a stepper
[18:53:28] <alex_joni> and it didn't quite go to 6, but 7.5 was OK
[18:54:05] <alex_joni> so base_thread had the usual stuff in it..
[18:54:19] <alex_joni> I suspect for an empty base thread one could go under 1 usec
[18:54:39] <alex_joni> or at least with stuff in there that takes less time than parport update
[20:09:01] <SWPadnos> ah - ok (alex)