#emc | Logs for 2007-09-09

[00:21:42] <Martini> does anyone know if the emc disc will install on the same hard drive with windows and set up a dual boot
[00:24:48] <jepler> Martini: long story short -- it's supposed to, the steps you take at installation are the same as for standard ubuntu 6.06, but I've never done that myself.
[00:25:03] <jepler> Martini: the internet turns up lots of pages with advice & instructions, such as http://www.mattvanstone.com/2006/06/dual_booting_ubuntu_606_and_wi/ when googling for ubuntu 6.06 dual boot
[00:27:13] <Skullworks-PGAB> I would add a extra HDD 20GB is plenty - boot to the live CD and point the install there.
[00:28:01] <Skullworks-PGAB> then you could use either Win or Linux to config the boot loader menu
[00:47:20] <eric_u> skunkworks, where's your engraver?
[00:47:30] <eric_u> link on ebay I mean?
[00:51:48] <jepler> eric_u: http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=320155952581 I think
[00:54:57] <Martini> i have an extra 10 gig,may just put it on that,thats how my other computer is
[00:56:11] <Roguish> hey all. with 4th axis setup, AXIS display thinks i have a rotary 4th axis, even though it's defined as 'linear' and tkemc shows and does it correctly. any help on AXIS?
[00:58:13] <jepler> Roguish: "A" is always considered rotary
[00:58:36] <Roguish> ok, should i change it to U?
[00:58:58] <jepler> if you are using the CVS version of emc, you can call it "U". in 2.1, the only axis names are XYZABC.
[00:59:48] <Roguish> 2.1.7
[00:59:56] <jepler> OK, then you can't call it "U".
[01:00:43] <Roguish> willl that change it to a linear axis?
[01:00:52] <jepler> *can't*
[01:01:24] <Roguish> can't ? no linear 4th axis?
[01:01:30] <jepler> not in the 2.1 series.
[01:01:37] <Roguish> poooooo
[01:01:38] <jepler> in 2.1, the only axis names are XYZABC
[01:02:44] <Roguish> well i got my cabling and wiring worked out. that's the immediate goal.
[01:02:54] <Roguish> working my way to a 'gantry' system.
[01:04:20] <Roguish> anyway, with AXIS the A axis does move, just very slowly. switcht to tkemc and the axis spins very quickly without ANY other changes.
[01:04:48] <Roguish> could this be a problem?
[01:05:26] <jmkasunich2_> sounds like a bug in tkemc - A should not be linear
[01:06:08] <fenn> is this when jogging or using mdi/gcode?
[01:07:02] <Roguish> well there is no real indication that it's rotary or linear. just when i do any jog moves the action is quite faster than in AXIS.
[01:07:23] <fenn> tkemc uses some weird default value for jog speed, there's a slider
[01:07:34] <fenn> it starts at "1" which is 1 inch per minute
[01:07:42] <fenn> unless you set some ini parameter
[01:07:47] <jepler> in an XYZA setup (e.g., stepper-xyza) the A axis is jogged at the speed shown on the second jog slider, in degrees/min
[01:08:57] <Roguish> i copied the z axis .ini lines to the a axis 'cause i am using the same drive and motor.
[01:09:45] <fenn> anyone: what happens if you use XXYZ on the COORDINATES line?
[01:10:22] <jepler> nothing useful
[01:12:15] <Roguish> so, if i do a cvs checkout and run-in-place will i be able to get 4 linear axes?
[01:14:00] <fenn> yes, i'm not sure that's what you want though
[01:14:27] <fenn> for example, you command g0 X1 you want two linear axes to move
[01:14:28] <jepler> yes, the "nineaxis" feature is in the CVS version. but you're talking about a gantry, not >3 independent linear axes which is what UVW is for
[01:15:34] <Roguish> i'm just trying 4 linear as a precursor to the gantry. i have already been reviewing the stepper-gantry demo.
[01:15:47] <fenn> Roguish: do you need to be able to jog the two gantry axes independently?
[01:16:15] <Roguish> depends upon how the homing routing works.
[01:17:00] <Roguish> a manual method is to home them together, then diable one and jog the other to where ever it needs to be.
[01:17:41] <dmessier> Hi all
[01:17:57] <Roguish> and actually the homing routine is what i want to work on. there are several philsophies.
[01:18:15] <Roguish> philosophies
[01:18:27] <Roguish> methods
[01:19:28] <dmessier> like what... all i need is to be able to home in any axis... 1 at a time and end up all homed...before i start working steel
[01:19:40] <Roguish> looking forward to a gantry style, 6 axis router.
[01:19:56] <Roguish> 7 motor plus the spindle.
[01:20:02] <dmessier> nutating head??
[01:20:32] <dmessier> twin x-axis drives...
[01:21:03] <Roguish> yes
[01:21:25] <fenn> roguish how do you know if the twin axes are out of square when they aren't homed? or do you just assume they are close enough when you start off?
[01:22:16] <Roguish> gotta assume something. it's in the setup of the homed positions. takes a bit of effort to square it up.
[01:22:26] <dmessier> the twins are a master and slave relationship...
[01:22:45] <Roguish> essentially
[01:24:11] <fenn> i dont get 'gantrykins' it doesnt seem to do anything
[01:24:17] <dmessier> you can set up the tweak factors quite accuratly... the toshiba mph with tosnuc 888-2 had fiber optic link.... if you ahd too much vibration it wacked..
[01:25:22] <dmessier> i found out at a show... where the machines arent bolted down to begin with...
[01:26:37] <Roguish> thanks for the help. time for dinner. ttfn
[01:43:25] <fenn> Roguish: here's some info on gantry stuff, and how it does homing: http://sourceforge.net/tracker/index.php?func=detail&aid=1075625&group_id=6744&atid=356744
[01:44:31] <PeterW> SWP? 5I22-1m subsystem ID is 3132 (though the 31series numbers may change when PLXTec gets off their buts and gives use some new SSIDs) -- Peter (dumbass/lazy)Wallace
[01:46:10] <fenn> boy word gets around quick these days
[01:48:04] <a-l-p-h-a2> a-l-p-h-a2 is now known as a-l-p-h-a
[01:48:21] <jepler> PeterW: thanks
[01:48:27] <jepler> SWPadnos: did you see that? ^^^
[01:49:25] <jmkasunich> hi PeterW
[01:50:31] <SWPadnos> hi
[01:50:35] <PeterW> Hi
[01:50:46] <jmkasunich> * jmkasunich tries to extract foot from mouth
[01:50:49] <SWPadnos> heh
[01:51:03] <SWPadnos> while you're at it, could you grab mine as well ;)
[01:51:40] <SWPadnos> thanks Pete
[01:51:51] <SWPadnos> have you worked on the 5i22 loader yet
[01:51:56] <SWPadnos> ?
[01:52:21] <jmkasunich> so just to be perfectly clear, the codes for the 5i22 1.5M are 10b5/9054/10b5/3131, and the codes for the 1.0M version are 10b5/9054/10b5/3131
[01:52:35] <jmkasunich> and the codes for the 5i20 are 10b5/9030/10b5/3131
[01:52:41] <jmkasunich> is that correct?
[01:52:44] <SWPadnos> 3132 for the 1M
[01:52:57] <jmkasunich> crap, I thought thats what I was typing
[01:53:04] <SWPadnos> you typoed it :)
[01:53:57] <jmkasunich> 5i22 1.5M = 10b5/9054/10b5/3131, 5i22 1.0M = 10b5/9054/10b5/3132, 5i20 = 10b5/9030/10b5/3131
[01:53:57] <SWPadnos> that's interesting. it's PLX that issues the SSIDs?
[01:54:21] <PeterW> 1m = 3132 1.5m = 3131 for now, I have a request in for new numbers for the 5i22/5i23 but PLXTech is being coy
[01:54:41] <SWPadnos> what's the 5i23?
[01:54:48] <SWPadnos> (going to be)
[01:56:11] <PeterW> like 5i20 (72 I/O) same price as 5I20 but 400K spartan3/9054 - 5V tolerant
[01:56:21] <SWPadnos> ok, cool
[01:56:24] <CIA-8> 03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: revise subsystem device ID for the 1M gate 5i22 (per Peter Wallace on IRC)
[01:56:32] <SWPadnos> so like the 5i21 but not the RS422 thing
[01:57:09] <jmkasunich2_> heh, should I add a line to the loader for the 5i23
[01:57:11] <jmkasunich2_> ?
[01:57:33] <PeterW> I guess you could look at it that way, It actually was made from the 5I22 schematic with FPGA transplant
[01:58:06] <jmkasunich2_> with the 9054 bridge, it will probably program more like the 5i22 as well
[01:58:20] <PeterW> yess, All 9054 loaders are the same
[01:58:40] <SWPadnos> I'm thinking of it functionally/feature-wise. the 5i21 is a 400k spartan 3, but it has the differential transceivers instead of generic I/O connectors, and it uses the 9054
[01:58:53] <PeterW> Right
[01:58:57] <SWPadnos> so, does the 9054 generate the /INIT signal, or is that just not used the same way?
[01:59:40] <SWPadnos> the saprtan datasheet doesn't make it look like you can program with only two pins plus data ...
[01:59:45] <SWPadnos> spartan
[01:59:54] <PeterW> Iinit is generated by the FPGA, it is of some minor use to poll but the 9054 only has 1 input bit and one output bit...
[02:00:15] <SWPadnos> ah, no wonder :)
[02:00:15] <jmkasunich> so INIT is not readable from the PC side?
[02:00:19] <jmkasunich> bummer
[02:00:42] <SWPadnos> I saw all of those unused FPGA pins, and was wondering why you didn't connect more of them to the 9054 :)
[02:00:50] <jmkasunich> on the 5i20, /INIT going low before DONE goes high is how you detect a CRC error
[02:01:02] <jmkasunich> guess you can't do that on the 5i22?
[02:01:49] <PeterW> No, but then again if you dont get done your screwed anyway
[02:01:57] <jmkasunich> PeterW: can you take a quick look at lines 36-70 of http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/utils/bfload.c?annotate=1.4
[02:02:19] <jmkasunich> if you could share the corresponding info for the 5i22 it would really be helpfull
[02:05:25] <jmkasunich> I guess the step at line 63 "wait for /INIT high, done clearing memory" can be done using a timeout instead of waiting for the pin to change
[02:05:48] <SWPadnos> it's a 100us wait in the 5i21 loader
[02:06:08] <jmkasunich> and CRC errors would be detected if you transfer the required number of bytes plus final clocks and don't see DONE
[02:06:10] <PeterW> Most of that is on the .UCF or .PIN files in the 5I22 zip file. Ill take a look at the schematic on Monday and if anything is missing Ill get it to you
[02:06:42] <SWPadnos> oh - I'm assuming it was OK to send jmk that hostmot2.zip you sent me (sorry for not asking first)
[02:06:51] <PeterW> Yes 100 usec wait will (have to) do
[02:06:50] <jmkasunich> what isn't in the ucf is the connections between the bridge and the FPGA (other than LAD0-31, those are obvious)
[02:07:35] <jmkasunich> lines 40-46 of that file I kind of had to deduce (or in some cases figure out with an ohmeter)
[02:07:47] <jmkasunich> I still don't know what GPIO2 and 6 are connected to
[02:08:52] <PeterW> I think the only things that are not in the UCF file are the configuration connections, since thers no other GPIO on the 9054
[02:09:15] <jmkasunich> ok
[02:09:29] <SWPadnos> I had wondered about the names GPI and GPO - I wasn't sure if those were typos for "1" and "0"
[02:09:32] <PeterW> (on the 5I20 the unused GPIO is just that, unused)
[02:09:40] <jmkasunich> with only two it won't be as hard to figure out
[02:10:00] <SWPadnos> and they're connected to DONE and /PROGRAM
[02:10:07] <PeterW> No on the 9054 you have one GPI and one GPO...
[02:10:18] <SWPadnos> yeah - I see that now. kinda strange
[02:11:11] <PeterW> Whats worse is that they are also DMARQ and DMAACK if you use the 9054s DMA controller
[02:11:14] <CIA-8> 03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: mystery pins turned out to be unused
[02:11:35] <SWPadnos> I saw that in the manual. it didn't make much sense to me, but I think it does now
[02:13:48] <PeterW> Theres some logic on the card to disable /PROGRAM assertion when the FPGA asserts DISABLECONF - in case you want to use DMA and dont want the FPGA reset by DMAACK
[02:14:35] <jmkasunich> I doubt we'll be using DMA
[02:15:02] <SWPadnos> is there a way to tell that the FPGA was successfully configured?
[02:15:04] <jmkasunich> I guess that can be used as a protection bit - if you simply assert DISABLECONF once your config is loaded, you can't load another one without powering down
[02:15:21] <jmkasunich> SWPadnos: I think a rising edge on DONE tells the tale
[02:15:27] <PeterW> We have some customer using it, getting sustained 84 MB/S transfers
[02:15:46] <SWPadnos> ok - I wasn't sure if that was per word handshaking
[02:15:50] <PeterW> Yes done high means your ok
[02:15:56] <SWPadnos> PeterW, that's a pretty good rate
[02:16:29] <SWPadnos> do you know the motherboard chipset? (some VIA chipsets suck for DMA, so the card/9054 may be able to go faster)
[02:17:52] <PeterW> I think thats close to the limit, I think it was data transfer on 11 out of every 16 PCI clocks
[02:19:13] <SWPadnos> well, that's pretty darned good, though unneeded here :)
[02:20:15] <jmkasunich> thats pretty darned close to video capture rates isn't it?
[02:20:38] <SWPadnos> faster (unless you're talking full HD) - that's bytes, not bits
[02:20:49] <jmkasunich> 500K pixels x 3 bytes per pixel times 60 frames = 800x600
[02:21:06] <jmkasunich> (round numbers)
[02:21:09] <SWPadnos> except that's not how video capture is done ;)
[02:21:24] <SWPadnos> a frame grabber would need much more data
[02:21:37] <jmkasunich> more?
[02:21:44] <jmkasunich> I thought with interleave and such it would be less
[02:21:49] <SWPadnos> more than video capture
[02:21:54] <jmkasunich> like 30 full frames per second, not 60
[02:22:34] <PeterW> (well actually it is for a sort of video capture thought thats about all I can say)
[02:22:36] <SWPadnos> I think a frame grabber just gets progressive frames from a camera source, which could be high resolution
[02:23:12] <jmkasunich> PeterW: you're not giving away much, very few other things stream that much data ;-)
[02:23:18] <SWPadnos> video capture is the one that goes interlace, gets compressed to 4:2:2 etc
[02:23:22] <SWPadnos> heh
[02:24:17] <jmkasunich> I bet you could build a CGA card in one of those boards ;-)
[02:24:42] <SWPadnos> you can do CGA with a PIC :)
[02:25:29] <PeterW> BTW The 5I20s throughput can be improved with a simple hardware hack (Rev G and >)
[02:25:40] <SWPadnos> heh
[02:25:46] <SWPadnos> smilies are funny sometimes
[02:25:52] <SWPadnos> the > ) became an alien face
[02:25:57] <jmkasunich> so far nothing that we've been doing has been even close to throughput limited
[02:26:41] <PeterW> Actually you can do mono VGA easily in the 5I22
[02:27:04] <jmkasunich> I said CGA because it has digital outputs - you'd need DACs for VGA
[02:27:04] <PeterW> Greater aliens?
[02:27:22] <SWPadnos> well, if you input and output at max speed, you can get close to 60 MB/second with 4 of my analog boards on a 5i22
[02:27:26] <PeterW> Resiistors are fine
[02:27:29] <jmkasunich> but from a gate-count point of view, I don't doubt it
[02:27:47] <SWPadnos> r-2r DAC - there are plkenty of pins
[02:27:53] <jmkasunich> yeah
[02:28:00] <jmkasunich> still an external board tho
[02:28:19] <SWPadnos> each connector becomes 3x 6-or 7-bit DAC, plus HSYNC+VSYNC
[02:28:22] <SWPadnos> true
[02:28:36] <jmkasunich> multi-head!
[02:28:41] <SWPadnos> d00d!
[02:28:50] <PeterW> for mono its just one series resistor...
[02:28:54] <SWPadnos> I already have a triple-head video card, thank you
[02:29:46] <jmkasunich> which package is the 9054 on the 5i22 in?
[02:29:53] <jmkasunich> PQFP or PBGA?
[02:30:02] <PeterW> pwfp
[02:30:07] <PeterW> pqfp
[02:30:10] <jmkasunich> thanks
[02:30:53] <jmkasunich> so PROGRAM is driven by USERo/ aka pin 158?
[02:31:26] <PeterW> Yep, its the only output bit weve got....
[02:31:55] <jmkasunich> and DONE comes in USERi/ pin 159
[02:32:01] <PeterW> Yep
[02:32:38] <jmkasunich> I dunno why I'm putting pin numbers into the file, but they might be handy some day
[02:32:47] <SWPadnos> hmmm jus tso Idon't have to read the whole manual, what are the M, J, and C modes?
[02:32:56] <SWPadnos> if there's a nutshell version
[02:33:39] <PeterW> Dont recall off hand, I think we only use J mode
[02:34:20] <SWPadnos> ok. that's good to know since the pinouts change depending on mode (from what I've seen in the table of contents)
[02:34:57] <jmkasunich> I'm looking at the pinout page - the data bus changes from LAD0 thru LAD31 (mode J) to LD0 thru LD31 (mode C) to LD31 thru LD0 (mode M)
[02:35:43] <SWPadnos> hmmm. so no addresses in C or M, which are big-endian vs. little-endian versions of each other
[02:35:55] <PeterW> BTW the reason we dont use all the pins is that on a 6 layer board we cant route them all (plus bank limitations) basically an economic decision
[02:35:58] <jmkasunich> C and M also differ in other areas
[02:36:12] <jmkasunich> J and C have LBE0 thru 3 (byte enables), M doesn't
[02:36:32] <SWPadnos> PeterW, yeah - fanout can be a bitch, especially for the small BGAs
[02:36:41] <PeterW> Yah no separated addresses, always muxed A-D bus
[02:37:01] <SWPadnos> what PCB software do you use?
[02:37:08] <jmkasunich> is there a status LED on the 5i22, or did that also get eliminated because of no GPIO to drive it?
[02:37:34] <SWPadnos> there are INIT and DONE LEDS on the board
[02:37:35] <PeterW> (Our schematic object has inner pins labled H for Hard...)
[02:37:48] <SWPadnos> heh
[02:38:08] <PeterW> Yep just 2 lousy bits...
[02:38:12] <jmkasunich> "in case of emergency use these pins"
[02:38:31] <jmkasunich> what about the FPGA's WRITE/ pin
[02:39:08] <jmkasunich> tied to /LWR as on the 5i20?
[02:39:17] <jmkasunich> oh, wait
[02:39:18] <SWPadnos> ah - table 1-2 tells what the modes are (page 1-6, 38 in the pdf)
[02:39:26] <jmkasunich> /CS is tied to /WR
[02:39:34] <jmkasunich> /WRITE goes to GPIO
[02:39:58] <PeterW> Dont remember without the schematic, it is probably just pulled low
[02:40:03] <jmkasunich> ok
[02:41:24] <maddash> federer FTW!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
[02:42:12] <PeterW> JMK - I can send you a schematic
[02:42:21] <jmkasunich> PeterW: that would be appreciated
[02:42:34] <jmkasunich> I'll only put the programming relevant signals in the source
[02:42:49] <jmkasunich> then I'll treat the rest as top secret
[02:42:56] <jmkasunich> (let the dog eat it)
[02:43:17] <maddash> what's this 5i22 business?
[02:43:28] <jmkasunich> 5i20 on steroids
[02:43:37] <maddash> what's this 5i20?
[02:43:41] <jmkasunich> 33% more pins, and 7.5 times as many gates in the FPGA
[02:43:44] <SWPadnos> now wit h extra connectors!
[02:43:58] <maddash> oh, that fpga mesa board?
[02:44:02] <SWPadnos> yes
[02:44:03] <jmkasunich> yes
[02:44:04] <Jymmm> maddash: 5i20 us tghe secret code name for the new Nacho Cheese
[02:44:08] <PeterW> JMK - OK, I'd prefer the schematic not be published, not rocket science but still
[02:44:17] <maddash> isn't that a waste of an fpga
[02:44:22] <maddash> a fpga*?
[02:44:29] <jmkasunich> understood - as I said, there are only a couple signals I want to understand
[02:44:35] <SWPadnos> maddash, why would you say that?
[02:44:39] <Jymmm> maddash: It's damn good Nacho Cheese... gives you super powers!
[02:44:52] <jmkasunich> PROGRAM, DONE, /CS, /WRITE, etc
[02:44:55] <Jymmm> maddash: Then you can be like SWPadnos
[02:45:03] <maddash> Jymmm: ew.
[02:45:05] <jmkasunich> similar to the listing that I showed you earlier
[02:45:31] <maddash> SWPadnos: this mesa board's primary purpose is to function as a i/o board, right?
[02:45:34] <jmkasunich> if you'd rather just tell me what those few signals connect to, thats fine too
[02:45:42] <PeterW> Actually I should probably append those to the .PIN files anyway
[02:45:58] <Jymmm> PeterW: Come on... dont ya want to see the schematics at part of the background for any new logo/splash scrrens ;)
[02:46:00] <SWPadnos> maddash, no, its major purpose is to function as anything you can fit in the FPGA, with the 72 or 96 I/O connections it has
[02:46:03] <jmkasunich> maddash: you can put lots of stuff in the FPGA - if it was just 96 pins, you are right
[02:46:21] <jmkasunich> but how about step generators, serial ports, encoder counters, PWM generators, etc?
[02:46:36] <Jymmm> PeterW: (kidding of course)
[02:46:50] <PeterW> Silence
[02:46:53] <SWPadnos> don't forget expensive analog I/O from a little company in Vermont :)
[02:47:03] <maddash> SWPadnos: so it's like one of those altera boards from fpga4fun, except with shitloads more i/o (and more freedom)?
[02:47:10] <maddash> SWPadnos: the fpga is reprogrammable?
[02:47:14] <jmkasunich> maddash: yes
[02:47:23] <jmkasunich> the pluto is something like 20K gates
[02:47:26] <Jymmm> SWPadnos: Expensive yes, but support sucks... those guys are more arrogant than me!!!
[02:47:30] <SWPadnos> and it's actually designed by an engineer for industry, not by a hobbyist for hobbyists ...
[02:47:32] <jmkasunich> the 5i20 is 200K, and the 5i22 is 1500K
[02:47:37] <maddash> * maddash orgasm
[02:47:59] <jmkasunich> also, the pluto is crippled by using the parport
[02:48:01] <SWPadnos> and a side bonus - the xilinx tools run natively on Linux
[02:48:09] <jmkasunich> the 5i20 does 32 bit PCI transfers
[02:48:28] <Jymmm> and the 5i22?
[02:48:30] <SWPadnos> oh, and as soon as someone gets off their butt, there will be a Mesa parallel port / USB unit as well :)
[02:48:45] <SWPadnos> the 5i22 does 32-bit transfers as well
[02:48:52] <SWPadnos> or better! :)
[02:48:59] <jmkasunich> of course
[02:49:08] <maddash> wow, $429
[02:49:38] <SWPadnos> wow - only tice the price for 7.5x the number of gates!
[02:49:42] <SWPadnos> twice
[02:49:46] <Jymmm> PeterW: I just want to see this as part of the firmware for the next product http://www.faqs.org/rfcs/rfc2324.html
[02:50:14] <jmkasunich> Jymmm learn VHDL and program it yourself
[02:50:26] <maddash> holy crap, why bother with the TP at all, then? or emc, for that matter? just port over the tp code and leave usr_intf in
[02:50:29] <SWPadnos> or verilog if you like
[02:50:36] <Jymmm> jmkasunich No way! I want plug n pour!!!
[02:50:46] <maddash> with that many gates, it'd be a breeze to implement a floating point trajectory planner
[02:51:02] <SWPadnos> heh - breeze, no. possible, possibly :)
[02:51:15] <maddash> Jymmm: "pour"?
[02:51:25] <Jymmm> jmkasunichI dont think the FDA would approve of direct IV drip
[02:51:26] <SWPadnos> read the RFC he linked
[02:51:49] <maddash> Jymmm: nice.
[02:51:49] <jmkasunich> "RFC 2324 - Hyper Text Coffee Pot Control Protocol (HTCPCP/1.0)"
[02:52:25] <maddash> rofl error 418 is the best
[02:52:58] <maddash> holy crap, this guy is serious about coffee pot control
[02:53:27] <SWPadnos> 1 April, 1998
[02:53:45] <SWPadnos> and don't forget the carrier pigeon protocol
[02:53:47] <Jymmm> Yeah, one more year to actually implement it on it's 10th year anniversary
[02:54:36] <SWPadnos> I guess the real question about error 418 would be, why would you implement HTCPCP on a teapot?
[02:54:37] <PeterW> That woke up an really old neuron - from Reboot: I'm a little teapot shout and stout - this is my input and this is my out...
[02:54:46] <SWPadnos> heh
[02:55:02] <SWPadnos> some neurons are better left dormant
[02:55:10] <PeterW> yep
[02:55:27] <maddash> swpadnos: you can get 1.5M gates from http://www.enterpoint.co.uk/moelbryn/raggedstone1.html for $211
[02:55:59] <jmkasunich> no PCI bridge
[02:56:12] <SWPadnos> and shit for I/O connections
[02:56:49] <jmkasunich> "Large number of user I/O available"
[02:56:50] <maddash> so you're paying $200+ extra for "non-shit" i/o?
[02:56:52] <jmkasunich> dunno what that means
[02:57:18] <SWPadnos> and they're 140 UKP, which is over $280 now (unless you're astudent, which I'm not)
[02:57:22] <maddash> and what kind of fpga does this 5i22 use? I'd read the manual, but my xpdf keeps dying when I flip to the TOC
[02:57:24] <jmkasunich> maddash: the 5i2x boards have 50 pin ribbon connectors using standard opto-22 industrial I/O pinout
[02:57:27] <jmkasunich> with interleaved ground
[02:58:00] <maddash> SWPadnos: it's $211. switch over to pricing in dollars (middle at the right)
[02:58:41] <SWPadnos> no, the raggedstone1-1500 is $280.00, $329 including VAT
[02:58:56] <SWPadnos> look at the store
[02:58:56] <maddash> jmkasunich: "50 pin ribbon ..." == the black brackets with pins on the board?
[02:59:10] <jmkasunich> on the mesa board, yes
[02:59:12] <jmkasunich> two rows of pins
[02:59:30] <jmkasunich> those single row connectors on the ragged board are not rugged at all
[02:59:33] <maddash> SWPadnos: meh. I'm a student. ignore me.
[02:59:45] <SWPadnos> the $120 one is 400k gates
[03:00:00] <jmkasunich> also, they do the PCI bridge function inside the FPGA
[03:00:08] <jmkasunich> dunno how many gates that uses up
[03:00:13] <maddash> ah, spartan 3 fpga.
[03:00:23] <SWPadnos> that's an interesting board, but there's a very big difference between things meant for people to play with and things meant for people to use
[03:00:53] <PeterW> Weve considered doing a low cost bridgeless card, But they are something of a pain if you misprogram them, they require dual config memory (or newer spartan with selectable SPI memory offset)
[03:00:58] <maddash> jmkasunich: pci core lives outside the mesa fpga?
[03:01:27] <jmkasunich> yes, there is a PLX9030 (on the 5i20) or PLX 9054 (5i22) bridge chip that handles all the PCI stuff
[03:01:44] <PeterW> Also require bus switches on PCI bus for 5V PCI tolerance
[03:02:13] <jmkasunich> the raggedstone board has a row of 5 bufferish looking chips between the PCI connector and the FPGA
[03:02:19] <jmkasunich> guessing thats what they are
[03:03:08] <maddash> so what do you folks use the 1.5M gates for?
[03:03:16] <SWPadnos> dunno yet :)
[03:03:16] <maddash> on the Mesa, I mean
[03:03:33] <jmkasunich> so far EMC only supports the 5i20 - 200K gate version
[03:03:40] <jmkasunich> we're working on support for the 5i22
[03:03:42] <SWPadnos> I'll be using some of them for generic I/O, and two interfaces to a 6-ADC + 8 DAC board I designed
[03:04:27] <SWPadnos> I may also throw in slew rate limiting on the DAC and averaging on the ADC if I have time
[03:04:43] <jmkasunich> just noticed another "feature" of the raggedstone board
[03:04:55] <jmkasunich> you can't always program it from the PCI bus
[03:05:00] <jmkasunich> chicken/egg thing
[03:05:12] <maddash> how do you know that?
[03:05:16] <jmkasunich> need a PCI core to enable access, and need access to load the PCI core
[03:05:22] <jmkasunich> reading the FAQ
[03:05:34] <jmkasunich> they normally program it with a JTAG cable
[03:05:38] <SWPadnos> then skip straight to "MOTHERBOARD BOOT FREEZES WITH RS1 FITTED"
[03:05:46] <jmkasunich> heh
[03:06:01] <SWPadnos> it's a demo board that also has a PCI connector, not a PCI development board
[03:06:42] <SWPadnos> it's like adding an SPI connector, only more pins
[03:07:08] <maddash> so mesa solves this by using an external pci controller. which always works?
[03:07:13] <jmkasunich> right
[03:07:14] <SWPadnos> yes
[03:07:38] <jmkasunich> btw, raggedstone will sell you the netlist for their PCI core, for 500 to 3000 british pounds
[03:07:39] <maddash> wow, I almost went ahead to buy the raggedstone.
[03:07:42] <jmkasunich> no open source here
[03:09:34] <maddash> maybe I could get a cheap dsp board and hook it up with 5i20 -- fpga generates the output signals to my CNC, while the DSP calculates the trajectory.
[03:09:41] <jmkasunich> if you want to do FPGA on the really cheap, get a pluto
[03:09:54] <jmkasunich> 20K gates or so, and 15-20 I/O or so, for about $70
[03:10:00] <jmkasunich> plugs into the parport
[03:10:03] <SWPadnos> or wait for the 7i43, which will be ~$10 more, with 200k gates I think
[03:10:12] <jmkasunich> if you want to do FPGA stuff a little better, get a 5i20
[03:10:21] <jmkasunich> 5i22 is for people who need LOTS of gates
[03:10:27] <maddash> the pluto is cheap, no doubt, but what can you do with it besides step generation and basic i/o?
[03:10:37] <SWPadnos> whatever you can fit into the gates
[03:11:02] <SWPadnos> I think the first application was actually PWM + encoder for 3 or 4 servos, not step generators
[03:11:13] <jmkasunich> yep
[03:11:29] <SWPadnos> and if you want, you can stick in one PWM and 2 step generators
[03:12:15] <maddash> isn't PWM for servos only? and aren't step generators for steppers only? or has the world grown larger while I've been away?
[03:12:35] <jmkasunich> thats pretty much correct
[03:13:03] <jmkasunich> mixing and matching is for oddball requirements
[03:13:15] <jmkasunich> three axis servo machine with a stepper running a tool turret, for example
[03:13:15] <maddash> so why would you mix PWM with step generators? is there some benefit to using servos and steppers simultaneously?
[03:13:16] <SWPadnos> step+dir can be used for servos with drives such as geckos and rutexes (and many others)
[03:13:32] <SWPadnos> well, if you have 2 steppers and an analog servo amp, yes
[03:14:16] <maddash> oh, ok. I thought that this was some cool thing I didn't know know
[03:14:49] <SWPadnos> even with steppers, you may want one PWM for spindle speed control
[03:15:41] <maddash> you can use a servo to control a spindle?
[03:15:56] <SWPadnos> you can use an analog output to control some spindles
[03:16:05] <SWPadnos> PWM output is basically a slow DAC
[03:16:14] <SWPadnos> (if used that way)
[03:17:01] <maddash> THIS IS SO COOL!
[03:17:10] <maddash> * maddash goes back to porting emc's motion module to some embedded processor or gargantuan fpga.
[03:17:22] <SWPadnos> hav efun
[03:17:24] <SWPadnos> have fun
[03:17:38] <SWPadnos> or as apple would say, have iFun
[03:17:50] <jmkasunich> PeterW: still here? http://www.pastebin.ca/687998
[03:18:07] <maddash> ifun costs $200 less than it did two months ago.
[03:18:08] <jmkasunich> the first part is the existing 5i20 notes, the 2nd part is my best guess at the 5i22
[03:18:31] <PeterW> Rats, forgot to tell the dog to eat, wont eat if not told...
[03:18:34] <jmkasunich> if you can confirm/correct that, I don't need the schematic
[03:18:37] <SWPadnos> heh
[03:18:40] <jmkasunich> a dog that won't eat?
[03:18:42] <SWPadnos> as long as he doesn't eat the rabbits
[03:18:43] <jmkasunich> thats a strange dog
[03:18:57] <SWPadnos> usually you have to use a stick to stop them from eating
[03:19:09] <maddash> only if the dog is actually a bitch.
[03:19:12] <maddash> * maddash hides.
[03:19:43] <maddash> sorry, couldn't hold it in
[03:20:23] <maddash> oh, dear -- silence.
[03:20:33] <jmkasunich> who farted?
[03:20:33] <SWPadnos> late - working on other things ...
[03:20:35] <PeterW> Hes afraid of the rabbits, especially if they thump
[03:20:38] <SWPadnos> heh
[03:21:19] <jmkasunich> he should be afraid of those rabbits - they intend to take over the world
[03:21:29] <jmkasunich> starting with the dogs I bet
[03:21:30] <maddash> wabbits!
[03:21:33] <SWPadnos> rab-bert
[03:21:36] <PeterW> JMK looks right, I'll confirm on Monday
[03:21:40] <jmkasunich> thanks
[03:21:49] <SWPadnos> yes - thanks (both of you)
[03:22:37] <jmkasunich> SWPadnos: you want to take a shot at the actual programming function? copy the 5i20 one, replace the init/ check with a 100uS timeout, and tweak some stuff
[03:22:50] <SWPadnos> yep. I can do that
[03:23:40] <jmkasunich> the size of the data is embedded in the bitfile - ch->len
[03:23:48] <PeterW> Yes the 5I22 programming is basically the same, just I/O bit/base address changes
[03:23:49] <jmkasunich> lemme commit what I just pastebined
[03:24:10] <SWPadnos> I just need to come up with a small FPGA config that does the blinkenlight thing on all the connectors
[03:24:34] <Jymmm> SWPadnos: like a POST ?
[03:24:41] <jmkasunich> maybe now that my sewer work is almost done I can get back to the driver stuff
[03:24:42] <SWPadnos> kinda
[03:24:46] <maddash> if the glove don't fit, you must commit
[03:24:46] <SWPadnos> heh
[03:24:53] <SWPadnos> been holding it too long? :)
[03:25:19] <maddash> yeah. there's a whole choir singing that phrase in my head
[03:25:18] <Jymmm> jmkasunichsewer or septic?
[03:25:20] <PeterW> You can use IOPR24, but you wouod have to blink the lights yourself (it does blink the LEDS)
[03:25:50] <maddash> SWPadnos: you bought the 5i22?
[03:25:59] <SWPadnos> ok. unfortunately I can't see the board-mounted LEDs - they're (a) inside the case and (b) on the underside of the board
[03:26:02] <jmkasunich> he bought several of them
[03:26:05] <SWPadnos> maddash, I have 5 of them, yes
[03:26:47] <SWPadnos> hmmm. I may be able to peek beyond the cable
[03:26:48] <maddash> he must be awfully rich.
[03:26:54] <PeterW> Well connect an LED or 7I31 to a cable...
[03:26:57] <SWPadnos> he's got a job for them
[03:27:04] <SWPadnos> I have a 7i31 on a cable :)
[03:27:16] <CIA-8> 03jmkasunich 07TRUNK * 10emc2/src/hal/utils/bfload.c: documented 5i22 config related signals
[03:27:44] <jmkasunich> I managed to get work to buy me a 5i20 for doing some drive work
[03:27:48] <SWPadnos> that requires software, which takes a little longer to verify operation, and doesn't tell me if the software isn't working :)
[03:27:59] <jmkasunich> it will be interesting to see how it holds up in a high noise environment
[03:28:17] <SWPadnos> all you need is 72 filter caps
[03:28:23] <maddash> SWPadnos: a job? mass panic? terrorism? world domination? those are the only things that 7.5M gates are fit to do.
[03:28:34] <SWPadnos> the 5 boards are for 5 units
[03:28:37] <Jymmm> maddash: PONG
[03:28:42] <SWPadnos> so it's only 1.5M gates per unit
[03:28:54] <maddash> Jymmm: skynet.
[03:29:05] <skunkworks> I'll be back
[03:29:09] <Jymmm> maddash: No, just 4 player PONH
[03:29:13] <Jymmm> PONG
[03:29:15] <SWPadnos> and I could probably use the 5i20 for it, but this job isn't cash-strapped, so I didn't want to screw myself by getting the least cost unit
[03:29:49] <jmkasunich> Jymmm: sewer http://jmkasunich.dyndns.org/cgi-bin/blosxom/index.html
[03:30:40] <maddash> SWPadnos: so you get paid to play with FPGAs?
[03:30:51] <jmkasunich> he gets paid to make things work
[03:30:57] <jmkasunich> FPGAs are just a means to an end
[03:31:14] <maddash> FPGAs are a means to world domination!!!!!!!!!!!11111111
[03:31:44] <SWPadnos> um - methinks maddash has been watching Hudson Hawk a bit too much
[03:31:49] <jmkasunich> I thought that was rabbits
[03:32:07] <jmkasunich> or are FPGAs the tools that rabbits will use to dominate the world?
[03:32:11] <maddash> frickin' rabbits with frickin' fpgas stuck up their ___
[03:32:28] <skunkworks> fpga are a way to make things without actually having to make things.. at least that is what my intoxicated mind is understanding.
[03:32:28] <Jymmm> jmkasunich How long have you been w/o sewer?
[03:32:49] <jmkasunich> completely without, less than a day
[03:33:00] <Jymmm> Ok, not too bad, I guess
[03:33:19] <jmkasunich> there has been a broken pipe under the porch for at least a couple months, and it was running slow
[03:33:29] <Jymmm> jmkasunichHope you ran that exxtra line for the shower in the new area that you
[03:33:36] <Jymmm> 'll get to in 10 years
[03:35:10] <Jymmm> you got half the place dug up, one more pipe aint gonna hurt
[03:35:26] <maddash> jmkasunich: how did this (http://willepadnos.net/jmkasunich/airguard-spin-flat-0522.jpg) end?
[03:35:32] <jmkasunich> not sure what you are talking about?
[03:35:43] <jmkasunich> maddash: he recovered easily - they do that on purpose all the time
[03:35:57] <jmkasunich> the "not sure" was to Jymm
[03:36:00] <maddash> jmkasunich: oh, so it wasn't unexpected?
[03:36:16] <jmkasunich> nope - I think they call it a hammer-head stall
[03:36:17] <Jymmm> jmkasunich You know, you've always wanted to have a sink/toilet/shower [insert some areas of your property here] but there was no sewer line close enough to do it.
[03:36:26] <jmkasunich> straight up, stall, tip over, and eventually dive out of it
[03:36:52] <jmkasunich> strangly, I never wanted a shower in the front yard
[03:37:09] <Jymmm> Like turn part of a garage into a an apartment, or game room, etc
[03:37:13] <SWPadnos> no, but a toilet there could be useful
[03:37:28] <jmkasunich> the garage is detached and 50+ feet the other direction
[03:37:45] <Jymmm> jmkasunich pvc pipe is cheap
[03:37:50] <jmkasunich> there _was_ a basement bathroom, but I'd rather have basement space for tools and machinery - there's a bathroom at the top of the steps
[03:38:02] <jmkasunich> Jymmm digging trenches isn't
[03:38:12] <Jymmm> jmkasunichfront of any home depot
[03:38:23] <Jymmm> Pedro, Jesus, Jose, Manual
[03:38:41] <jmkasunich> sigh
[03:41:37] <jmkasunich> Jymmm: "detached garage"
[03:41:55] <jmkasunich> you do know what that means? it means water freezes in there in the winter
[03:43:58] <SWPadnos> PeterW, the sample 5i22 configs are made for the 1M FPGA - any suggestions on getting them into the 1.5M version (other than procesing the source vhdl with the new target)?
[03:45:02] <Jymmm> jmkasunich I thought that x number of feet below ground level it wouldn't freeze.
[03:45:42] <PeterW> I knew I forgot something... I can send you one on Monday, Its all on work computer, I can copy it here and compile it on the laptop but its kind of a pain..
[03:46:25] <PeterW> ypu could also compile the IOPR24 demo, that should be hitchless
[03:46:31] <PeterW> you
[03:47:14] <SWPadnos> ok. I'll start with that, and if I get stuck, I'll do other things until you get the 1.5M demos done :)
[03:47:30] <PeterW> Actually theres a IOPR24 config in the distribution zipfile
[03:48:06] <PeterW> The SPI demo was 1M because thats what I happened to test it on
[03:48:11] <SWPadnos> yep - I saw that
[03:48:14] <SWPadnos> hmmm
[03:48:50] <SWPadnos> I only saw two versions of the IOPR24, one for the proto boards and one for production
[03:50:54] <PeterW> They are both 1.5M configs, we haven't shipped any 1M yet You can tell by the uncompressed config file size 1M is about 393k 1.5 M is bigger
[03:55:53] <PeterW> Q? What would EMC like to see as the hardware side of a UART? I've go my UARTs working, Weve got some new Amps that have serial interface
[03:56:57] <PeterW> (5I2x UART)
[03:58:33] <SWPadnos> ok - the IOPR24.BIT file is for the 1.5M part - cool
[04:02:37] <jmkasunich> PeterW: regarding UARTs, I really don't know - that isn't something that really lends itself to a HAL driver
[04:02:57] <jmkasunich> (its not a "signal" like a DAC, ADC, encoder position, step rate, etc)
[04:05:42] <SWPadnos> it depends on how the data is used at the other end
[04:05:47] <PeterW> There is some protocol involved, but thats basically a fixed header, data and a checksum. For a 3phase amp its just a single 32 bit word write
[04:06:09] <SWPadnos> any readback (like position or velocity?)
[04:06:14] <PeterW> (to our 32 interface UART)
[04:08:19] <jmkasunich> oh, you are talking about a UART that is connected to a specific device on the other end
[04:08:40] <PeterW> The amp used alone has no knowledge of position, and just echos status. position is up to other FPGA pins, if you add our PVT module, it can echo position but normally just ack or nak
[04:10:36] <PeterW> Actually the UART is generic, Though in current incarnation only 8 bit 1 start 1 stop mode
[04:10:50] <jmkasunich> goodnight all
[04:10:56] <jmkasunich> thanks for the info PeterW
[04:11:18] <PeterW> Welcome! Goonight
[04:11:49] <SWPadnos> does the UART take a 32-bit word and do 4 byte writes?
[04:11:52] <PeterW> Well goodnight anyway
[04:11:57] <PeterW> yes
[04:12:13] <SWPadnos> hmmm. ok
[04:12:27] <PeterW> or 3 or 2 or one, depending on write address
[04:13:13] <SWPadnos> if I knew what it would be connected to, and I also knew that the UART firmware would do all handshaking needed, then I can see it being useful in a HAL context
[04:13:35] <PeterW> Same thing on read, pops 1,2,3, or 4 bytes depending on read address
[04:13:37] <SWPadnos> so the servo amp that takes a 32-bit instruction word - HAL can write that word and move on
[04:13:40] <SWPadnos> ok
[04:14:17] <SWPadnos> actually, what would be really great would be a modbus port :)
[04:14:43] <SWPadnos> just load up an array of modbus variables, with all the protocol support in the FPGA
[04:14:47] <PeterW> right, Also have a global hold register (transmit buffers are 64 bytes) so all channels can be written, and the released at onece
[04:14:55] <PeterW> once
[04:15:03] <SWPadnos> ok, that's cool
[04:15:28] <SWPadnos> baud rates limited by cable lenght, I imagine
[04:15:33] <SWPadnos> length
[04:15:42] <PeterW> Modbus is a might bit more challenging
[04:15:46] <SWPadnos> heh
[04:15:55] <SWPadnos> that's why I'd want it in hardware :)
[04:16:15] <SWPadnos> or a microcontroller in the FPGA - maybe stick an AVR core in there or something
[04:16:41] <PeterW> We expect to use either 5Mb/s or 3.8432 Mb/sec,Cat5 cable
[04:17:56] <maddash> resume. fudging, blurring, distorting, lying. oops.
[04:18:52] <PeterW> Usually better space wise to use a FPGA tailored processor (say PicoBlaze)
[04:19:04] <SWPadnos> sure - that works
[04:20:30] <PeterW> Just saw someone managing Gig Ethernet in Virtex with Picoblaze per channel. Probably 40 or so would fit in SP3-1.5M
[04:20:49] <PeterW> (picoblaze that is)
[04:20:57] <SWPadnos> wow. I'm surprised the picoblaze can run that fast
[04:21:22] <SWPadnos> though I'm sure the Virtex helps there
[04:21:29] <PeterW> Not sure how fast it runs in Virtex but at least 100 mhZ
[04:21:34] <PeterW> mhZ
[04:21:41] <SWPadnos> MHz :)
[04:21:51] <PeterW> dREADED cAPSlOCK
[04:21:52] <maddash> is picoblaze equivalent to, say, avr?
[04:22:03] <SWPadnos> I think my H key is screwed - I heep typing Mz instead of MHz
[04:22:13] <PeterW> Simpler but tiny
[04:22:21] <maddash> SWPadnos: then how would you ask for h-h-h-h-help?
[04:22:22] <SWPadnos> maddash, close enough - it's a small micro designed by Xilinx for their FPGAs
[04:22:34] <SWPadnos> I type it like a brit - 'elp!
[04:22:56] <Jymmm> SWPadnos: Te ell you would!
[04:23:29] <SWPadnos> yea, well sit man. I'da tougt you'd elp me out ere, but I guess you're a sitead
[04:23:43] <SWPadnos> assole
[04:24:09] <Jymmm> SWPadnos: sut up you wore!
[04:24:19] <SWPadnos> come ere and say tat!
[04:24:21] <maddash> omg, what have I created?
[04:24:29] <SWPadnos> it's your fault
[04:24:37] <SWPadnos> boneead
[04:24:51] <maddash> o
[04:25:13] <SWPadnos> don't just say o to me young man. not if you want to reac tirty
[04:25:17] <Jymmm> maddas: that'll teac you to open you're big mout!
[04:25:52] <maddash> Jymmm: "that'll"? ypocrite.
[04:26:05] <maddash> :P
[04:26:06] <SWPadnos> like president Bus!
[04:26:15] <Jymmm> Sigh.... 7" TV buy it now for $64, shippping $50
[04:26:39] <maddash> Jymmm: low on cash?
[04:26:53] <Jymmm> maddash: no, why?
[04:27:19] <maddash> "Sigh...."
[04:27:39] <Jymmm> maddash: the cost of shipping is almost as much as the product
[04:27:53] <maddash> that's abnormal?
[04:29:02] <fenn> maddash: avr processing speed is mostly limited by the flash program memory
[04:29:41] <SWPadnos> hmmm. how would you come to that conclusion?
[04:29:49] <fenn> i just heard it somewhere
[04:29:51] <SWPadnos> ah
[04:30:12] <fenn> someone was talking about overclocking z80's i think
[04:30:17] <SWPadnos> heh
[04:30:23] <SWPadnos> apple, meet orange
[04:30:47] <fenn> and i was wondering how such an old chip could do 200MHz
[04:31:21] <SWPadnos> holy crap. newegg has a special where you buy a power supply (900W, so it's not cheap), and get a 250G hard drive free O_O
[04:32:43] <SWPadnos> did they have to cool it with liquid nitrogen?
[04:33:43] <SWPadnos> the Z80 kind of sucked for clocks/operation. there were no instructions that took less than 2 clocks, and anything that used more than one register or used a constant + a register was 4 or more IIRC
[04:34:25] <fenn> http://en.wikipedia.org/wiki/Zilog_eZ80
[04:35:07] <SWPadnos> oh - the eZ80 isn't the same as the Z80
[04:35:59] <SWPadnos> and they're not saying they've clocked a Z80 at 200 MHz, just that the new chip is the equivalemt of a Z80 at 180/200 MHz
[04:36:00] <fenn> heh
[04:36:01] <fenn> Nov 17 17:08:34 Lars_G Z80 at 250? O.O
[04:36:01] <fenn> Nov 17 17:08:42 Lars_G right. cooled in liquid nitrogen, right?
[04:36:07] <SWPadnos> heh
[04:36:43] <fenn> http://ghutchis.googlepages.com/tv80homepage
[04:37:39] <maddash> wrhee cna I pirtea a fpga cihp?
[04:37:41] <PeterW> Most decent FPGA CPUs are 1 clock/instruction, Though I think the PicoBlaze2 is 2 (haven't messed with PicoBlaze2 just PicoBlaze1)
[04:37:47] <maddash> whoops.
[04:38:06] <PeterW> pirtea?
[04:38:21] <maddash> pirate*
[04:38:23] <SWPadnos> I can check it out. I think I have picoblaze, TSK-51 and TSK-3000 available to me
[04:38:30] <SWPadnos> and probably microblaze as well
[04:38:52] <SWPadnos> (then there are the NIOS and NIOS-2 for Altera)
[04:38:56] <maddash> anyway, why are you folks bothering with processors? aren't fpgas capable of executing everything combinatorial-ly? ie, all at once?
[04:39:08] <PeterW> Microblaze is pretty nice though not free
[04:39:59] <skinnypuppy1334> Ranque-Hilsch air seperator been wanting to make one of these for shrink fit items.
[04:40:01] <skinnypuppy1334> Ranque-Hilsch
[04:40:13] <skinnypuppy1334> http://en.wikipedia.org/wiki/Vortex_tube
[04:40:17] <SWPadnos> I've got the Xilinx and Altera tools, with *blaze and NIOS licenses
[04:40:36] <PeterW> Neat!
[04:40:43] <SWPadnos> then there's Altium, with the licenses for various other CPUs
[04:41:28] <SWPadnos> taht is cool
[04:41:30] <PeterW> I think Lattice's Mico32 is GPL, not sure how big it ends up in Xilinx
[04:41:30] <SWPadnos> that
[04:41:49] <SWPadnos> hmmm. I think I have the lattice tools as well, come to think of it :)
[04:43:03] <SWPadnos> oh - no software, just 3 of therir dev kits
[04:43:52] <PeterW> maddash - Got to do some thing sequentially so things _dont_ all happen at once :-)
[04:44:06] <PeterW> things
[04:44:33] <SWPadnos> I think LabView FPGA uses about half the gates for serialization
[04:44:51] <SWPadnos> they even have a fancy name for it - it's the "enable chain
[04:44:52] <SWPadnos> "
[04:47:41] <fenn> i like the idea of putting a processor on the same chip, with connections to the fpga
[04:48:08] <SWPadnos> I really wanted to have that - the Atmel FPSlic is an AVR with 5k-40k gates around it
[04:48:11] <PeterW> Some Virtex models have embedded PPC
[04:48:17] <SWPadnos> but it was always very expensive
[04:48:34] <SWPadnos> yep - Excalibur from Altera as well I think
[04:48:36] <fenn> is there any good reason its expensive?
[04:48:46] <SWPadnos> I think it just never got too popular
[04:48:50] <fenn> well, duh
[04:48:54] <PeterW> Tell me about it (deisgning in Virtex 5 for PCIe card)
[04:48:57] <SWPadnos> no other good reasons I know of
[04:49:08] <fenn> chicken/egg is a lame business strategy
[04:49:59] <SWPadnos> they may have had process issues with it - most FPGAs are done on very low voltage processes these days, but microcontrollers use 3-5V internally
[04:49:59] <PeterW> That reminds me, gotta close chicken coop...
[04:50:05] <SWPadnos> heh
[04:50:16] <PeterW> Racoons...
[04:50:23] <SWPadnos> oops
[04:50:32] <fenn> hmm, most avr's run on 1.8V supply these days
[04:50:48] <fenn> or maybe it was 2.2
[04:50:58] <Jymmm> PeterW: Reaccon,s ye we believe you... we know the chickens are really your product staff stuffing componets!
[04:51:01] <SWPadnos> they can, but the spec is generally 2.something -5.5V
[04:51:39] <SWPadnos> and FPGAs nowadays run off <1 to 1.8V internally, and have "3.3V-tolerant" I/O
[04:51:42] <PeterW> Even the PICs (yes they are horrible) we are using are 2.5V or maybe 1.8V core
[04:52:24] <fenn> 3.3V tolerant? like, they will blow up if you feed them 5v and put out 1.8V signal?
[04:52:24] <SWPadnos> yeah - I'm just not sure if Atmel had trouble with the FPSLIC that prevented cost reduction, or if it never got popular enough to go down in price
[04:52:46] <SWPadnos> fenn, yes, the IOs will smoke on some FPGAs if you put 5V on them
[04:53:16] <PeterW> They would probablly eat the SMT parts, good grit....
[04:53:28] <Jymmm> PeterW: heh =)
[04:53:32] <fenn> the eggs would be extra yellow from the lead
[04:53:46] <Jymmm> PeterW: with RoSH, no change of metal poising
[04:53:51] <Jymmm> chance
[04:54:00] <PeterW> We are slowly getting out of the lead business
[04:54:03] <fenn> if you dont mind antimony
[04:54:10] <SWPadnos> I like cadmium
[04:54:12] <PeterW> No intimony
[04:54:17] <PeterW> antimony
[04:54:37] <PeterW> Solder is tin/copper/silver
[04:55:10] <maddash> PeterW: then use an oscillator
[04:55:35] <maddash> "I've got the Xilinx and Altera tools, with *blaze and NIOS licenses" <--- mr. moneybags.
[04:55:43] <SWPadnos> heh
[04:55:48] <PeterW> Dont like your tone...
[04:55:50] <SWPadnos> I've been collecting for ~5 years
[04:56:10] <maddash> SWPadnos: what's nios, anyway?
[04:56:11] <SWPadnos> they have very good trade show discounts
[04:56:23] <fenn> SnSb5, tin with 5% of antimony, is the US plumbing industry standard. Yay US!
[04:56:29] <SWPadnos> it's the Altera embedded processor, 8 to 32 bits, etc
[04:56:32] <maddash> PeterW: from before: "maddash - Got to do some thing sequentially so things _dont_ all happen at once :-)
[04:56:38] <maddash> "
[04:56:56] <SWPadnos> you still need a clock - FPGAs aren't combinatorial
[04:57:06] <maddash> hence, oscillator
[04:57:12] <SWPadnos> CPLDs may be, I don't know
[04:57:15] <maddash> oh geez, did I scare him off?
[04:57:18] <SWPadnos> PALs and GALs are
[04:57:26] <SWPadnos> dunno
[04:57:34] <maddash> pals? gals? I need 'em both.
[04:57:42] <maddash> more of the latter, preferably.
[04:57:49] <SWPadnos> whichever yoiu prefer
[04:58:27] <maddash> SWPadnos: it's been my dream these past months to play with a large scale FPGA
[04:59:03] <SWPadnos> well, if you can get to an Embedded Systems Conference or similar, you can probably pick up a development kit for $500 or so
[04:59:10] <fenn> i dont think you even need something so fancy
[04:59:17] <fenn> most are programmable by jtag
[04:59:22] <fenn> can build that out of junk lying around :P
[04:59:53] <fenn> its the software that's the killer though
[04:59:54] <SWPadnos> including board, some nice FPGA on it, sometimes with various interfaces like ethernet and LCDs, plus the licensed software (time limited to a year usually)
[05:01:33] <PeterW> FPGAs can be just combinatorial...
[05:01:50] <SWPadnos> don't you still needa clock (for any LUT-based ones anyway)?
[05:02:24] <PeterW> No, after config you dont
[05:02:49] <SWPadnos> ok. you can bypass the output FFs for the LUTs?
[05:02:55] <PeterW> FF on LUT output is optional
[05:02:59] <SWPadnos> ok
[05:03:02] <SWPadnos> cool
[05:04:06] <PeterW> Didi you get your loader to work?
[05:04:15] <SWPadnos> I've been chatting instead of working :)
[05:04:18] <PeterW> Did
[05:04:43] <PeterW> Well, get to work :-)
[05:05:37] <SWPadnos> yes boss
[05:07:58] <toast> fff
[05:08:40] <maddash> toast: hacked through any Pentagon networks yet?
[05:10:47] <maddash> how the fek do I add page numbers in openoffice? geezus.
[05:10:50] <toast> if by "hacked through" you mean "visited their webpage once in like 2003"
[05:10:56] <toast> then yes
[05:11:20] <maddash> haha.
[05:11:28] <PeterW> PeterW is now known as PeterDumbassW
[05:11:53] <PeterDumbassW> Gnite all
[05:12:23] <toast> i'm not even sure what is going on here
[05:12:27] <toast> but it is mysterious
[05:15:31] <maddash> ettercap. wireshark. arping. credit card numbers. porno. female roommate. et al.
[05:16:48] <maddash> seriously, my school doesn't provide encryption for the wireless APs they give us
[05:17:18] <maddash> so it should be possible to sniff out and view all the data sent by anyone
[05:18:17] <maddash> yay, done with CV. time for House!
[05:18:43] <toast> that's why i always tunnel home
[05:19:03] <maddash> toast: i'm homeless. :(
[05:19:14] <toast> i can't control the internet, but i can control my point of exit
[05:20:05] <toast> are you
[05:20:08] <toast> are you so homeless
[05:20:15] <toast> you cannot hijack someone's home PC
[05:20:38] <toast> i forget who did that
[05:20:56] <toast> dude lived with his laptop in abandoned buildings
[05:21:01] <toast> hijacking APs
[05:21:06] <maddash> then?
[05:21:25] <toast> hacked stuff
[05:21:32] <toast> nobody could find him because he was homeless
[05:21:37] <maddash> ROFL
[05:21:47] <toast> it was very ghost in the shell
[05:21:49] <maddash> just leave some bait on the door step
[05:22:11] <toast> he didn't travel with his laptop either
[05:22:18] <toast> he left it at the buildings until he was going to move
[05:23:02] <maddash> how'd he get electricity? food?
[05:23:16] <toast> i read about it like, years ago
[05:23:21] <toast> i don't remember
[05:23:29] <toast> he may have been a professional hacker
[05:23:33] <toast> he was homeless by choice
[05:23:48] <toast> that much i remember
[05:24:13] <Jymmm> maddash: he hacked/stole/leeched it
[05:24:20] <toast> i wonder if you could rootkit somebody's pc and install GFS on cygwin
[05:24:30] <toast> and just use a massive botnet as a storage array
[05:24:33] <maddash> Jymmm: haha.
[05:24:42] <maddash> gfs?
[05:24:46] <maddash> girlfriends?
[05:24:51] <toast> global filesystem
[05:24:54] <maddash> I didn't know girls needed cygwin
[05:24:56] <toast> it's a clustering filesystem
[05:25:01] <maddash> whoa.
[05:25:07] <toast> for networked drives
[05:25:15] <toast> i don't think it requires every node to be up
[05:25:16] <maddash> what if one of the PCs weren't connected?
[05:25:23] <toast> i think it's got mirroring
[05:25:25] <maddash> neat. like skynet.
[05:25:30] <toast> set at various levels
[05:25:53] <toast> so you'd just have to figure out the average percentage of uptime on the botnet
[05:25:59] <toast> and set the filesystem to that
[05:26:38] <Jymmm> Wasn't there like one REAL website that reviewed cellphones w/o all the bullshit?
[05:27:08] <Jymmm> kinda like cdfreaks but for cellphones
[05:27:08] <maddash> Jymmm: neo1973
[05:27:17] <Jymmm> maddash: no kybd
[05:28:03] <maddash> Jymmm: touchscreen, baby. multitouchscreen.
[05:28:14] <Jymmm> maddash: buttons, REAL buttons
[05:28:37] <maddash> Jymmm: why?
[05:28:47] <Jymmm> maddash: why not?
[05:29:11] <maddash> buttons accelerate the onset of carpal tunnel syndrome
[05:29:22] <Jymmm> bring it on baby!
[05:29:43] <Jymmm> virtual kybd brings on the urge to chuck the SOB and have to buy another one.
[05:29:50] <maddash> geez, I just had a brilliant idea -- i'll reprogram my wrt54g to attack the neighbor's WPA-PSK while I'm asleep!
[05:30:09] <maddash> Jymmm: no eyes?
[05:30:13] <toast> shouldn't you use something with a little more horsepower
[05:30:19] <toast> than a wrt54g
[05:30:23] <toast> to do any cracking
[05:30:29] <maddash> like?
[05:30:41] <toast> i dunno, a computer
[05:30:54] <toast> of the desktop, laptop, or rack-mount variety
[05:31:04] <maddash> i'm keen on saving energy. call me a treehugger.
[05:31:09] <Jymmm> toast: not really needed,
[05:31:24] <toast> you're just going to let the wrt chug along until it finishes?
[05:31:29] <Jymmm> toast: there's a pkg available for wrt54g that does it already
[05:31:37] <toast> i'm not saying you can't do it
[05:31:51] <Jymmm> it's not that hard to do
[05:32:01] <maddash> toast: hm, you're right -- it could take forever.
[05:32:26] <maddash> on the other hand, the wrt probably has a farther transmit range than my laptop
[05:33:28] <toast> so it's a matter of distance vs. years
[05:33:43] <toast> cantenna for your laptop?
[05:34:17] <toast> or you could just log the traffic
[05:34:18] <maddash> is that possible?
[05:34:24] <toast> on the wrt
[05:34:27] <toast> and offload it somewhere else
[05:34:29] <toast> crack it
[05:34:32] <toast> then go back to the wrt
[05:35:34] <maddash> hm, maybe I could open up the laptop and attach a cantenna to existing antennas
[05:35:41] <toast> dunno
[05:36:18] <maddash> "cantenna" sounds funny
[05:36:37] <maddash> reminds me of "canteen"
[05:36:53] <toast> and han solo
[05:37:23] <maddash> holy crap, my brother's supposed to come back from camp today
[05:43:07] <Jymmm> Eeeeeesh http://www.pbase.com/gpspassion/image/63431234/original.jpg
[05:45:08] <SWPadnos> nice broken windshield with all those GPses
[05:45:28] <SWPadnos> oh - those are wires, not cracks
[05:45:43] <SWPadnos> ok, that's it. time for bed. good night
[09:50:32] <kwajstabo> hello
[09:54:10] <kwajstabo> i have a problem with emc mailing list, my mails are rejected. I'm a meber of this mailing list, but i set the setting so that i don't receive mails (i read the list at sourceforge). Why is that?
[13:49:45] <awallin_emc> where is scripts/realtime on a proper install ?
[13:49:57] <awallin_emc> I've only used it with run-in-place...
[13:51:57] <SWPadnos> awallin_emc, I think you do sudo /etc/init.d/realtime start
[13:52:17] <awallin_emc> ok, let's try that
[13:55:55] <awallin_emc> insmod: error inserting '/usr/realtime-2.6.15-magma/modules/rtai_hal.ko': -1 File exists
[13:56:04] <awallin_emc> does that mean realtime is already running?
[13:56:06] <SWPadnos> look at dmesg output
[13:56:42] <awallin_emc> nothing bad there it seems
[13:57:04] <SWPadnos> there should be some error message from RTAI
[13:57:38] <SWPadnos> the "file exists" message is because basically every error returns -1, which is "file exists"
[13:57:49] <awallin_emc> ok
[14:03:38] <awallin_emc> hm, an old pyvcp xml file that worked previously doesn't want to work with 2.1.7
[14:03:54] <awallin_emc> anyone know how recent the pyvcp and pvcpparse are in 2.1.7??
[14:04:20] <awallin_emc> damn all these versions ... :)
[14:04:36] <SWPadnos> bope
[14:04:41] <SWPadnos> err - nope
[14:04:56] <SWPadnos> well, someone does, but it's not me :)
[14:05:15] <awallin_emc> guess I need to get TRUNK and compile...
[14:07:14] <awallin_emc> E: Build-Depends dependency for emc2 cannot be satisfied because the package lyx-qt cannot be found
[14:07:22] <SWPadnos> enable universe
[14:08:19] <awallin_emc> I did that, then:
[14:08:20] <awallin_emc> E: Could not open file /var/lib/apt/lists/au.archive.ubuntu.com_ubuntu_dists_dapper_universe_source_Sources - open (2 No such file or directory)
[14:08:38] <SWPadnos> damfino about that one
[14:09:11] <awallin_emc> maybe apt-get update?
[14:09:32] <SWPadnos> oh, of course you have to update after changing repositories
[14:09:48] <awallin_emc> is au for australia?
[14:10:00] <SWPadnos> I bleieve so
[14:11:20] <awallin_emc> It always defaults to au, and I'm in Finland... strange
[14:24:39] <awallin_emc> are any of the 242 updates Ubuntu suggests for a new 6.06lts installed from cd really useful?
[14:35:05] <awallin_emc> was there a ./configure option for no documentation?
[14:37:55] <acemi> I think that default is no documentation
[14:38:20] <acemi> there is an option as --enable-build-documentation
[14:38:32] <awallin_emc> ah, good.
[14:38:40] <awallin_emc> now running make.
[14:52:50] <ler_hydra> 'lo, anyone here?
[14:53:57] <awallin_emc> hi
[14:56:16] <ler_hydra> I seem to be having some issues.... ;)
[14:59:17] <ler_hydra> when doing the RT test I get a max latency of 24uS or thereabouts, so I've set my base period to 30uS. However when starting EMC I always get a "unexpected realtime delay, check dmesg". in dmesg the clocks were around 1000000, within 4000 clocks, and with an analamous clock of 1250000
[14:59:21] <ler_hydra> any ideas?
[14:59:37] <ler_hydra> this is the latest from-apt version
[14:59:45] <awallin_emc> how is the realtime test run? I could try it over here too
[14:59:53] <awallin_emc> don't know what your issue is...
[15:03:42] <awallin_emc> yay, now with TRUNK my pyvcp panel works
[15:03:56] <awallin_emc> let's hope the DACs work too...
[15:04:56] <SWPadnos> the realtime test is scripts/latency-test
[15:07:01] <awallin_emc> thanks swp, will try it later, I don't want to tear down HAL now that it seems to work...
[15:07:23] <SWPadnos> heh
[15:07:27] <SWPadnos> halcmd save :)
[15:33:59] <jmkasunich> good morning folks
[15:34:21] <SWPadnos> howdy
[15:34:28] <jmkasunich> how goes the loader?
[15:34:41] <SWPadnos> I actually did work on it a little bit last night :)
[15:34:45] <SWPadnos> too much IRC though
[15:39:41] <jmkasunich> anything I can do?
[15:40:37] <SWPadnos> not at the moment. I'm going to grab another coffee and finish it up
[15:40:43] <jmkasunich> ok
[15:41:04] <SWPadnos> unless you want to write an AD7656 or AD5764 interface module ;)
[15:41:22] <jmkasunich> thats ok
[15:41:41] <jmkasunich> I should focus on the infrastructure stuff again, before I lose my momentum
[15:42:44] <SWPadnos> heh
[16:07:25] <jepler> speaking of lost momentum, I should work on stepconf...
[16:30:27] <lewin1> lewin1 is now known as lewing
[17:18:35] <awallin_emc> latest pyvcp work: http://www.anderswallin.net/2007/09/pyvcp-m5i20-hostmot-4-test-panel/
[17:20:24] <awallin_emc> gotta go, bbl
[17:21:49] <dave_1> morning ray
[17:22:03] <rayh> Hi Dave
[17:22:27] <dave_1> seems quiet!
[17:22:40] <dave_1> you need to stir up something
[17:22:47] <rayh> Very perceptive!
[17:23:00] <rayh> Nah. You're turn.
[17:23:13] <dave_1> I'm fresh out of ideas
[17:23:50] <rayh> Hey take a picture of the front top of your Mazak and send it to me.
[17:24:12] <dave_1> I can try ... it is pretty much a dark hole
[17:24:21] <rayh> It would be toward the front from the tool release cylinder
[17:25:19] <rayh> I can point you toward what we need to see if you get me a first one.
[17:25:19] <dave_1> it is all one casting ... for the tool release cylinder and oriennd
[17:25:36] <dave_1> I'll give it a try.
[17:25:50] <rayh> Right. But there might be two large holes.
[17:26:04] <dave_1> I should do some rewiring so the front swings out easier.
[17:26:06] <rayh> The back one is the spindle stuff
[17:26:25] <rayh> The front one should be the orient stuff.
[17:26:52] <dave_1> I'll get you a pic or two and we can work from there.
[17:27:06] <Noobie1000> Hi, I'm looking for the latest gdepth module, which does not seem to be in the emc2.1.7 source download. Is there anything newer than version 0.2?
[17:27:12] <rayh> Swinging that electrical panel out of the way would make that picture easier.
[17:27:19] <dave_1> indeed
[17:28:10] <jepler> Noobie1000: gdepth is not a part of emc; if 0.2 is the last release you see on my emc blog (http://axis.unpy.net) then it's the latest there is
[17:28:12] <rayh> What's a gdepth module?
[17:28:30] <dave_1> my thoughts exactly
[17:28:49] <dave_1> might learn something here ;-)
[17:28:52] <jepler> http://axis.unpy.net/01169521961 a gcode "remaining material" previewer
[17:29:13] <jepler> http://axis.unpy.net/01169689661
[17:29:16] <rayh> Ah okay.
[17:30:34] <Noobie1000> Thanks jepler. With that version, I get a "0.5:0: File not open". Is there a python debugger I can use to see whats going on?
[17:31:14] <jepler> Noobie1000: first guess is that you are not specifying arguments properly -- it thinks you're using a file named "0.5" which could not be opened
[17:32:03] <jepler> make sure that when you use -x, -y and -z to specify initial material that you quote the values: -x "-1 1" instead of -x -1 1
[17:32:20] <dave_1> jepler ... looks like a pretty good emulation of the cut to me
[17:32:21] <Noobie1000> Thanks jepler. Exactly my mistake...
[17:34:56] <Noobie1000> jepler... now the file is being processed for a while and I get "NameError: global name 'glMaterialfv' is not defined". Any suggestions? (I am using the emc-environment, so my python modules should be resolved ).
[17:38:39] <dave_1> I'm gonna bail and go take a pic or two. See Ya.
[17:40:04] <jepler> Noobie1000: not sure -- 'glMaterialfv' should come from minigl, and is present in all emc 2.1.x releases and in the CVS development versions as well..
[17:40:32] <Noobie1000> jepler, even with the error, I did get a png :-). I only see a part of it (I am probably giving wrong dims for the material), but its very exciting. Thanks for a very cool feature.
[17:40:33] <jepler> Noobie1000: python -c 'import minigl; print minigl.__file__' to see if the minigl interface module is coming from a surprising location
[17:41:23] <jepler> if you are using a self-built run-in-place version it should come from inside that directory .. on my system, for instance, it comes from /home/jepler/emc2.head/lib/python/minigl.so
[17:41:37] <Noobie1000> I get: /usr/lib/python2.4/site-packages/minigl.so
[17:42:21] <jepler> is there a file 'minigl.so' in your self-built version?
[17:42:32] <jepler> what version is the installed version?
[17:43:46] <Noobie1000> I have a ~/emc2.1.7./lib/python/minigl.so
[17:46:05] <Noobie1000> jepler, I guess there are conflicts between my self built version and the ubuntu emc2 packages
[17:46:19] <jepler> % echo $PYTHONPATH
[17:46:19] <jepler> /home/jepler/emc2.head/lib/python
[17:47:06] <jepler> emc-environment should set PYTHONPATH in a way that makes the stuff in the self-built version take precedence over the installed version
[17:47:07] <Noobie1000> That one is good: /home/hugo/emc2.1.7/lib/python
[17:48:04] <jepler> but in the same shell, python -c 'import minigl; print minigl.__file__' says that it took the version in /usr/lib/python2.4/site-packages instead?
[17:49:00] <Noobie1000> I'll uninstall my ubuntu packages and try to sort out my paths. Thanks for the tips and keep up the good work
[17:49:24] <jepler> that should be unnecessary
[17:51:06] <jepler> boy, glade sure is tedious to use
[17:51:08] <jepler> bbl
[17:52:14] <Noobie1000> jepler. Thanks again. I got it working :-) (I was using 2 terminals, only one which had the proper env).
[18:15:30] <Martini> SWPadnos:u in here
[18:15:36] <SWPadnos> more or less
[18:15:54] <Martini> same here
[18:16:30] <Martini> got my 203v drives installed last nite
[18:16:37] <SWPadnos> great
[18:17:36] <Martini> gotta mount my pacsi steppers for x any y,then will be ready to try the encoder setup next weekend
[18:18:15] <Martini> how much trouble is it gonna be to set up 2 parports?
[18:18:20] <SWPadnos> should be easy
[18:18:40] <Martini> will emc detect the 2nd port
[18:18:50] <SWPadnos> sometimes you have to experiment with which address to use (for PCI parports)
[18:18:59] <Martini> once its set in bios
[18:19:06] <SWPadnos> emc doesn't detect anything - you have to set it up yourself
[18:19:11] <Martini> ahh
[18:19:37] <SWPadnos> if it's at a standard I/O address (unlikely if it's PCI), then the parport driver may see it automatically
[18:19:46] <Martini> wont the ports be 378 and 278
[18:19:58] <SWPadnos> I'm not sure if it still does this, but it used to scan the normal ports (378, 278, 3bc)
[18:20:03] <SWPadnos> no, not for a PCI card
[18:20:07] <SWPadnos> at least, probably not
[18:20:10] <Martini> k
[18:20:28] <SWPadnos> consult the wiki, I believe there's a page with aprport configuration notes
[18:20:31] <acemi> you can find the address with lspci -v
[18:20:32] <SWPadnos> parport
[18:20:49] <Martini> k
[18:21:43] <Martini> how many times per sec will i be able to read these encoders,is there a formula
[18:22:00] <SWPadnos> yes, there's a formula. consult the wiki ;)
[18:22:16] <SWPadnos> the wiki search is a very useful tool
[18:22:49] <Martini> the emc knowledge base?
[18:22:55] <SWPadnos> yes
[18:23:07] <Martini> k,thats where google took me
[18:23:56] <SWPadnos> hmmm. software encoder stuff may not be there
[18:24:01] <SWPadnos> I think it's in the user manual though
[18:26:30] <Martini> k,didnt see it there
[18:27:08] <SWPadnos> basically, the BASE_PERIOD determines how fast you can count. you should allow for two BASE_PERIODS per encoder count
[18:27:48] <SWPadnos> so if you have a BASE_PERIOD of 20000, that means there are 50000 interrupts/second, and you can count up to 25000 counts /second reliably
[18:28:08] <Martini> my base period is 10000
[18:28:11] <SWPadnos> oh, that's fast
[18:28:19] <Martini> athlon 64
[18:28:24] <SWPadnos> so you can count 50000 pulses per second
[18:28:41] <SWPadnos> that's per axis, they're counted in parallel (more or less)
[18:29:19] <SWPadnos> note that you'll probably have to slow down the base thread when you add a parport, unless you add a dual PCI parport card and use only the PCI ports
[18:29:43] <Martini> darn
[18:29:54] <SWPadnos> heh - shouldn't have saved that $5, eh? :)
[18:29:54] <Martini> or get a faster computer
[18:29:56] <Martini> lol
[18:30:03] <SWPadnos> no, a faster computer won't help at all
[18:30:15] <SWPadnos> it'll just sti and spin faster
[18:30:17] <SWPadnos> sit
[18:30:30] <Martini> was gonna use onboard port and a pci
[18:31:07] <Martini> i can get the dual port card if it would be better
[18:31:29] <Martini> dont wanna have a bottleneck
[18:31:29] <SWPadnos> it's likely to allow for faster base thread execution
[18:32:25] <Martini> http://www.gigaparts.com/store.php?action=profile&sku=HC0023
[18:32:35] <Martini> thats what i can get local
[18:32:45] <Martini> would that be good?
[18:33:26] <SWPadnos> no idea
[18:35:02] <Martini> its a dual pci card,but only uses 1 pci slot,2nd por attaches with a ribbon cable
[18:35:11] <Martini> port
[18:35:11] <skunkworks> I thought if the encoders quadture output was symetrical - you should be able to approch one tranistion per base_period
[18:35:22] <SWPadnos> sure - I just don't know how well that particular card will work
[18:35:30] <skunkworks> counting that is
[18:35:37] <SWPadnos> skunkworks, sure, you acn approach it, but it's best to have some margin
[18:35:47] <SWPadnos> hence "this is how fast you can reliably count" :)
[18:35:56] <skunkworks> right - but 20% would be better than 50%
[18:35:58] <jepler> any state has to persist at least (period+jitter) to guarantee there will be a sample during that state
[18:36:21] <SWPadnos> it may be period + 2*jitter
[18:37:05] <SWPadnos> though the low or negative jitter numbers aren't real - they're an artifact of the previous cycle being late
[18:38:38] <Martini> 25000 is the magic number im shooting for,will never run the machine any faster than that
[18:38:48] <Martini> would be 150 ipm
[18:38:52] <Martini> rapids
[18:40:36] <Martini> looks like that is possible even with a slower base period
[18:46:25] <tomp2> that dual port pci card uses mos 9815 parport controller chip, works with linux . mfctr is http://www.icintracom.com/america/parallel-card-p-6614.html?osCsid=d276c26d6ef97002db07f5d8e322135d
[18:49:43] <Martini> thanks,im gonna pick that up
[18:50:36] <tomp2> jmkasunich: hello
[18:50:49] <tomp2> on the m5i20 enable signal. yesterday we saw that the Xenable was tied to 2 hal pins, m5i20.0.dac-00.enable, and m5i20.0.out-08 ( eg for axis 0 ).
[18:50:57] <tomp2> that made sense to send 1 enable to the pwm2analog of the m7i33 and another to the amplifier...
[18:51:01] <tomp2> except the 7i33 has an input ENA and an output ENA which confuses the need for the 2 hals pins. thoughts?
[18:51:12] <Martini> SWPadnos:thanks for pointing out that bottleneck
[18:53:20] <jmkasunich> tomp2: I'm not at all sure of the details
[18:53:57] <jmkasunich> I think that dac-00.enable is not going to the 7i33 - it goes only to the PWM generator inside the FPGA
[18:54:22] <jmkasunich> and out-08 goes to a pin that is accessible to the user, to enable the amp
[18:54:47] <Skullworks-PGAB> JMK is your sewer issues resolved?
[18:55:15] <jmkasunich> skullworks-PGAB everything except inspection, filling the trenches, and cleanup
[18:55:25] <jmkasunich> http://jmkasunich.dyndns.org/cgi-bin/blosxom/index.html
[18:56:19] <Skullworks-PGAB> They wanted to tear mine all up too - put a dual cleanup pipe inline.
[18:56:54] <Skullworks-PGAB> would have required removing the front proach slab
[18:58:29] <jmkasunich> just tunnel under it ;-)
[18:59:39] <Skullworks-PGAB> clean out pipes would have come up thru it 2 feet to the left of the front door!
[18:59:45] <jmkasunich> ah
[19:13:31] <tomp2> I think 'dac-00.enable' does go to the 7i33 becuz ...
[19:13:37] <tomp2> Hal-integrator show P2pin23 dac-00-enable ouput
[19:13:43] <tomp2> and P2 is connected by a flatband to 7i33 for anyone using m5i20 and 7i33
[19:13:46] <tomp2> That same pin (P2p23) is linksp'd to Xenable in m5i20_io.hal
[19:13:49] <tomp2> and P4p33 (m5i20.0.out-08) is also linksp'd to Xenable in m5i20_io.hal
[19:13:50] <tomp2> The 7i33 is already connected to the Xenable this way, and it has an output on 'servo -amp connector' P2 pin 13 called ENA0.
[19:13:50] <tomp2> It seems the m5i20.0.out-08 connection isnt needed
[19:13:50] <tomp2> ( took a while to get the ducks lined up )
[19:16:06] <CIA-8> 03swpadnos 07TRUNK * 10emc2/src/hal/utils/bfload.c: Add initial support for programming PLX9054-based Mesa cards (5i22-1 and 5i22-1.5)
[19:27:48] <tomp2> http://www.drawblog.com/images/20070909122132177.jpg
[19:28:42] <tomp2> drawblog sux
[19:36:39] <jmkasunich> lol
[19:40:49] <tomp2> http://imagebin.org/10338
[19:43:32] <jmkasunich> have you confirmed that dac-00-enable actually comes out the ribbon cable to the 7i33?
[19:43:59] <jmkasunich> duh, I guess so, you have the P2pin23 there
[19:44:31] <jmkasunich> it seems like the out-08 is redundant isn't it?
[19:45:35] <tomp2> agreed, np, just checking myself
[19:45:59] <tomp2> could use a bit of hal-foo to allow the pwm w/o enabling amp ( for tests )
[19:46:57] <tomp2> thanks ( got another 4 outputs :)
[19:50:29] <tomp2> walkies bbl
[20:02:07] <eric_u> I haven't stared at the 7i33 long enough to know if the dac enable would be good to enable the amps.
[20:02:22] <eric_u> but it appears that the 7i37 outputs are a lot more robust
[20:03:21] <eric_u> I was just about to work on that when I realized that i put no power switch on my computer on the mill ;)
[20:03:51] <tomp2> from the 7i33 pdf...
[20:03:55] <tomp2> Each 7I33 channel has an 5V CMOS active high enable output available on the
[20:03:55] <tomp2> SERVO AMP / ENCODER connector. These signals are the logical inversion of the
[20:03:55] <tomp2> Enable inputs.
[20:15:12] <dmessier> hi all
[20:15:24] <tomp2> i can post an openoffice spreadsheet of the wiring m5i20 - 7133 - yaskawaSGDA-04 if i knew how ;) ( work in progress )
[20:15:29] <tomp2> dmessier: 'lo
[20:20:52] <tomp2> i tagged the ss onto end this wiki page http://wiki.linuxcnc.org/cgi-bin/emcinfo.pl?M5i20_Halvcp_Test_Panel
[20:40:21] <Martini> tomp2:did you make that Halvcp test panel?
[20:40:45] <tomp2> no
[20:40:53] <Martini> k
[20:41:31] <tomp2> awallin? anonimasu? maybe dallur?
[20:41:39] <anonimasu> no, I didnt
[20:41:40] <Martini> may have a m5120 project coming up soon,looks handy
[20:41:41] <anonimasu> awallin did
[20:42:18] <tomp2> thanks
[20:42:30] <Martini> i can make screens for mach,but way too green in linux to do anything
[20:43:11] <Martini> like that
[20:43:42] <jmkasunich> anders has made a newer test panel for the 5i20, using pyvcp (instead of the deprecated vcp that the first panel uses)
[20:43:41] <jmkasunich> http://www.anderswallin.net/2007/09/pyvcp-m5i20-hostmot-4-test-panel/
[20:44:58] <tomp2> nice! i do need to separate the enables, so i can see the analog out w/o enabling the amps, thanks awallin
[20:45:27] <tomp2> ( doj! or just not connect the wire, or pull the fuse or ... )
[20:48:40] <tomp2> 'connector1' is 2nd connector P3, 'connector2' is 3rd connector P4, the 1st connector (P1) is implied in the encoder feedback, enables, and dac output
[20:49:56] <tomp2> the "IO on connector" wasnt as obvious as I need ( no 2x4 attached )
[20:55:45] <SWPadnos> the first connector is P2 :)
[20:56:04] <SWPadnos> the JTAG connector is P1
[20:57:56] <tomp2> yes, "the 1st connector (P2)"
[21:16:35] <Guest269> Guest269 is now known as skunkworks_
[21:32:22] <eric_u> tomp, does your spreadsheet enable your drives?
[21:33:01] <tomp2> i think so, looking now
[21:33:10] <tomp2> btw: re: m5i20 analog output , 7i33 manual sez load >= 5k ohm, yaskawa SGDA is 30K input impedence
[21:33:51] <eric_u> are you sure yaskawa enable isn't 12-24v input?
[21:34:32] <tomp2> workin that out right now, finding the 0(5v),SG ,G-COM relations
[21:35:11] <eric_u> do you have a link to your manual?
[21:35:17] <tomp2> i hope i can trgr the opto even tho the opto is 24V supply ;)
[21:35:19] <tomp2> yes...
[21:38:30] <tomp2> http://www.yaskawa.com/site/dmservo.nsf/link2/MNEN-5CLKGN/$file/TSE-S800-15C.pdf
[21:39:10] <eric_u> I've always thought that the electrocraft/AB drives may be rebadged yaskawa
[21:48:09] <Skullworks-PGAB> maybe now - the old stuff isn't
[21:50:50] <eric_u> I'm not so sure now after looking at the pinouts
[21:57:11] <ds2> random musings...
[21:57:33] <ds2> is there a reason why using a potential meter + a high rez ADC won't work as an encoder?
[22:05:07] <fenn> that's what RC servos use
[22:05:11] <tomp2> a potentiometer mounted on a dc motor shaft is a 'servo' ( in rc motor speek ), yes it can be 'like' an encoder. precision is based on how prefect the pot is ( if 1 degree is exactly twice 0.5 degrees etc )
[22:05:28] <tomp2> perfect
[22:05:42] <fenn> and you only get one turn usually
[22:06:18] <SWPadnos> high resolution ADCs are very slow or very expensive (or both)
[22:06:37] <Roguish> hey all. compiling the trunk and received "configure: error: Required OpenGL header missing. "
[22:06:48] <ds2> SWPadnos: not if the mfg samples them
[22:07:05] <fenn> Roguish: did you apt-get emc-dev?
[22:07:13] <SWPadnos> ds2, true, though the expensive ones somehow seem to be out of sample stock all the time ;)
[22:07:29] <Roguish> probably not. will now.
[22:07:33] <ds2> so other then quality and expensive of a dac, a pot would work fine for machine encoder?
[22:07:39] <tomp2> rc servo use pwm, so might not need ADC
[22:07:41] <SWPadnos> for a few days, sure
[22:07:52] <ds2> SWPadnos: I suspect a 10bit ADC is cheaper then 1024 line encoder
[22:08:02] <ds2> few days? Hmmm
[22:08:20] <SWPadnos> but a 10 bit ADC + a pot that's meant to be rotated 1 million times is likely more than an encoder
[22:08:22] <fenn> unless you use a "non-contact" pot :P
[22:08:39] <SWPadnos> yep - an analog optical system would work well
[22:08:51] <SWPadnos> that's what's used in some guitar pedals
[22:09:00] <ds2> but then that boils down to making a optical film w/sufficient resolution
[22:09:03] <Roguish> fenn: synaptic says it's emc-dev is there.
[22:09:23] <SWPadnos> emc2-dev?
[22:09:43] <Roguish> emc2-dev, yes
[22:09:46] <SWPadnos> ok :)
[22:10:33] <fenn> ds2: you can make your own encoders ya know
[22:11:08] <ds2> fenn: I can do everything except make a high enough resolution optical film
[22:11:38] <SWPadnos> laser printers are high enough resolution if you use a large enough disk size
[22:11:39] <fenn> well, a standard 600 dpi laser printer seems high enough to me
[22:12:00] <ds2> eh?
[22:12:18] <SWPadnos> for a quadrature encoder, not an optical pot
[22:12:18] <ds2> don't I need 2 dots per line so that limits me to a 300count encoder or am I missing something?
[22:12:31] <SWPadnos> oh, if you want to make a linear encoder,sure
[22:12:38] <ds2> no, for rotary
[22:12:46] <fenn> if you have 300 lines per inch (from 600 dpi resolution) then you need a circumference of 1024/300 inches
[22:12:58] <fenn> plus fudge
[22:12:59] <ds2> ah like that
[22:13:20] <fenn> so approximately a 2 inch disc
[22:13:36] <ds2> Hmm
[22:13:36] <SWPadnos> 1 inch - pi*d
[22:13:53] <fenn> i like fudge :)
[22:13:55] <SWPadnos> heh
[22:14:23] <ds2> think a 600dpi inkjet on transparancy paper will work?
[22:14:32] <fenn> no
[22:14:42] <SWPadnos> inkjets don't have very good black density
[22:14:48] <fenn> ink doesnt soak into plastic either
[22:14:54] <SWPadnos> heh - there is that
[22:14:56] <ds2> Oh
[22:15:32] <fenn> apparently pcb boards are transparent to IR, and you can use the copper traces as encoder lines
[22:15:43] <ds2> Ohhhh nice
[22:15:49] <fenn> unless they put that green stuff on them
[22:16:13] <ds2> there are proto services that will do it w/o the soldermask
[22:16:57] <fenn> but if you go that far you might as well just buy an encoder disc
[22:17:33] <alex_joni> hi all
[22:17:39] <fenn> howdy
[22:17:40] <SWPadnos> hi Alex
[22:18:09] <alex_joni> * alex_joni is finally home
[22:18:30] <SWPadnos> oh good. you wouldn't want to spend too long vacationing in France after all :P
[22:20:13] <ds2> fenn: I can probally make 6 disc for < $50
[22:20:22] <ds2> using PCB proto services
[22:20:29] <fenn> you can buy discs for ~11 from us digital
[22:20:45] <ds2> Hmmmm
[22:20:54] <fenn> or less on ebay
[22:21:21] <ds2> I don't deal with ebay
[22:21:39] <ds2> didn't know usdigital sells just the disc
[22:21:41] <SWPadnos> your loss is my gain
[22:21:44] <alex_joni> SWPadnos: 2 weeks were more than enough :P
[22:21:49] <SWPadnos> heh
[22:21:53] <ds2> your risk is not my problem ;)
[22:21:53] <fenn> http://www.usdigital.com/products/disk/
[22:22:21] <fenn> i wonder if that ebay guy bought those drives brand new
[22:22:30] <fenn> they sure have a lot of (useless) feature
[22:22:36] <SWPadnos> the parker ones?
[22:22:40] <fenn> yeah
[22:22:55] <SWPadnos> I think he said the drives were removed from a factory
[22:23:04] <SWPadnos> hard to tell without any punctuation orwhitespace though
[22:23:11] <SWPadnos> or whitespace :)
[22:23:18] <ds2> Hmmm just realized another thing
[22:23:25] <fenn> yessometimesialsohavedifficultyreadingtextwithnowhitespace
[22:23:37] <ds2> the quad. is done by positing the LEDs.... not on the disc!
[22:23:54] <SWPadnos> ds2, you can do it either way
[22:24:16] <SWPadnos> but in either case, you have to be sure the alignment between the two pickups is good
[22:24:18] <fenn> eh, can't you just rotate the sensor slightly to get them in phase?
[22:24:31] <ds2> SWPadnos: yes, but doing on the disc requires even higher rez
[22:25:12] <SWPadnos> I think it's a waste of time to try to make your own encoders/disks, considering the low cost options available
[22:25:40] <SWPadnos> if you want to do it as a learning experience, good for you. if you want to do it because you think it'll save you something, well, have fun :)
[22:25:50] <ds2> until now, I didn't see disc themselves being available... of course the enter assembly isn't that stepp
[22:25:54] <ds2> steep
[22:26:02] <fenn> SWPadnos: what if i want to do it because i'm making an army of clanking replicators?
[22:26:31] <SWPadnos> then you're an idiot, and you have watched "Sky Captain and the World of Tomorrow" several times too many :)
[22:26:33] <skunkworks_> http://www.electronicsam.com/images/KandT/servostart/Endoder1.JPG
[22:27:15] <fenn> skunkworks_: how does that attach to the shaft btw?
[22:27:27] <skunkworks_> setscrew
[22:28:04] <fenn> the metal disc in the center is a setscrew collar?
[22:28:08] <tomp2> diy encoder & motor http://www.youtube.com/watch?v=tE9Fr7kBwVo ( do not connect this thing to a cutting tool :)
[22:28:13] <skunkworks_> fenn: yes
[22:29:25] <fenn> looks a bit wobbly
[22:30:07] <tomp2> wagawagawaga
[22:32:29] <fenn> wow "sky captain and the world of tomorrow" is a recent movie
[22:32:43] <SWPadnos> heh
[22:32:55] <tomp2> so now we know you go to the movies like once every 5 years ;)
[22:33:40] <fenn> was this actually a popular movie?
[22:33:50] <SWPadnos> it wasn't all that popular
[22:33:55] <Roguish> fenn: ok, re-installed everything emc2 in synaptic. still no compile. same error about opengl and python. what's up?
[22:33:59] <SWPadnos> I like it because of the visuals
[22:34:22] <tomp2> angelena jolie in latex ( pre thai tattoo )
[22:34:29] <fenn> i bet it was done by the same guy who made starship troopers
[22:34:31] <SWPadnos> also I thought it did pretty well at setting the 1930's sci-fi mood. but the story was only OK, and the acting was only pretty good
[22:35:43] <fenn> Roguish: what's the python error you get?
[22:35:52] <fenn> last line of the traceback
[22:35:58] <Roguish> checking for site-package location... /usr/lib/python2.4/site-packages
[22:36:01] <Roguish> checking GL/gl.h usability... no
[22:36:02] <SWPadnos> well, I don't know about that. I do think that Starship Troopers was one of the biggest piles of steaming doggie-doo I've ever seen
[22:36:02] <Roguish> checking GL/gl.h presence... no
[22:36:04] <Roguish> checking for GL/gl.h... no
[22:36:05] <Roguish> configure: error: Required OpenGL header missing. Install it, or specify --disa ble-python to skip the parts of emc2 that depend on Python
[22:37:12] <tomp2> 'steampunk' cool
[22:38:03] <SWPadnos> Roguish, try apt-get build-dep emc2
[22:38:39] <SWPadnos> I think it shouldn't be necessary, but what the heck - see if apt wants to install anything from that
[22:39:27] <fenn> on my system that file comes from mesa-common-dev
[22:39:56] <fenn> Maintainer: Debian X Strike Force :)
[22:40:13] <Roguish> no luck. same error.
[22:40:20] <SWPadnos> it looks like the openGL stuff isn't a dependency of emc2-dev, but it is part of the build-dep
[22:40:34] <SWPadnos> Roguish, did apt-get build-dep emc2 install anything?
[22:40:42] <fenn> build-dep emc2-axis
[22:40:48] <SWPadnos> no, no emxc2-axis
[22:41:01] <SWPadnos> axis is part of emc2 now, so there's no separate pacjage
[22:41:04] <SWPadnos> package
[22:41:12] <Roguish> ok, which one?
[22:41:26] <SWPadnos> apt-get build-dep emc2
[22:41:31] <fenn> well, opengl should be a dependency then
[22:41:39] <SWPadnos> it
[22:42:05] <SWPadnos> it's a build dependency, but not an emc2-dev package dependency (if I'm reading the control file correctly)
[22:42:18] <fenn> where is that file btw?
[22:42:35] <SWPadnos> http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/debian/control.in?rev=1.16
[22:42:44] <SWPadnos> or emc2/debian/control.in
[22:43:05] <fenn> oh hey its just like the apt-cache show output
[22:43:10] <SWPadnos> heh
[22:43:13] <SWPadnos> funny
[22:43:24] <Roguish> what?
[22:43:39] <fenn> Roguish: usually computer stuff is hard to read and full of <>'s and stuff
[22:43:43] <SWPadnos> note the build-depends line has opengl/mesa stuff in it, whereas the depends line for emc2-dev doesn't
[22:45:22] <Roguish> the 'apt-get build-dep emc2' installed a few things, but still same error.
[22:45:46] <SWPadnos> you may need to clearthe configure cache, but I don't remember how to do that
[22:46:05] <Roguish> boot? good ms answer
[22:46:10] <SWPadnos> no
[22:46:23] <SWPadnos> do you have nvidia restricted drivers installed?
[22:46:50] <Roguish> i do not think so. i believe i have the supplied ones.
[22:47:01] <Roguish> supplied with ubuntu
[22:47:02] <fenn> do you have a file /usr/include/GL/gl.h?
[22:47:46] <Roguish> no
[22:48:23] <fenn> uh.. try sudo apt-get install libmesa-glu1-dev
[22:49:06] <Roguish> ? Couldn't find package libmesa-glu1-dev ?
[22:49:14] <Roguish> that's an error.
[22:49:15] <fenn> pp[d
[22:49:18] <fenn> bah
[22:49:20] <fenn> my bad
[22:49:38] <fenn> libgl1-mesa-dev and libglu1-mesa-dev
[22:49:58] <Roguish> sounded like a good guess to me.
[22:50:15] <fenn> it used to be called libmesa, now its called libgl*-mesa
[22:51:16] <Roguish> both said 'already newest version'
[22:52:06] <SWPadnos> you may need to force reinstallation of those packages
[22:52:14] <Roguish> i could have a messed up graphics install. i was using the onboard ati until last week. i put in a simple nvidia board.
[22:52:24] <fenn> hmm.. neither of those actually provide GL/gl.h
[22:52:25] <Roguish> force? ok. how?
[22:52:40] <Roguish> command line?
[22:52:45] <SWPadnos> hmmm
[22:52:53] <SWPadnos> I'm not sure how to do it for a build-dep
[22:53:09] <SWPadnos> you can use sudo apt-get --reinstall install emc2-dev
[22:53:15] <fenn> hang on a sec
[22:53:21] <fenn> try sudo apt-get install mesa-common-dev
[22:53:34] <SWPadnos> oh - mesa-common-dev - that sounds good :)
[22:53:47] <fenn> (may not exist on ubuntu though)
[22:54:17] <Roguish> and the response was 'already newest version'
[22:54:37] <fenn> ok, that's the one you should reinstall
[22:54:55] <fenn> but i thought reinstalling emc2 should do that
[22:55:32] <Roguish> will 'uninstalling' then installing work better?
[22:55:40] <fenn> maybe
[22:55:45] <SWPadnos> that's teh thing - I don't know if you can do apt-get -reinstall build-dep emc2
[23:00:09] <jepler> dpkg-query -S /usr/include/GL/gl.h
[23:00:10] <jepler> mesa-common-dev: /usr/include/GL/gl.h
[23:01:29] <jepler> on my system that's required by libgl1-mesa-dev which is listed in the build-depends line of the emc2 package
[23:01:42] <fenn> and it's already installed on his system
[23:04:06] <ds2> anyone else finds mcmaster's website irritating at best?
[23:04:07] <jepler> bbl, then
[23:04:21] <eric_u> not as bad in windows
[23:04:50] <eric_u> is there a firefox adobe plugin?
[23:05:09] <eric_u> worst website is digikey
[23:05:31] <ds2> digikey is quite usable
[23:05:43] <eric_u> really?
[23:05:43] <ds2> mcmaster makes it impossible to compare 2 things by opening up 2 tabs
[23:06:03] <JymmmEMC> right-click, open fram in new tab/window
[23:06:03] <ds2> at least with digikey, I can lay them out in different tabs to compare
[23:06:06] <fenn> i'd take digikey over mcmaster any day
[23:06:07] <JymmmEMC> right-click, open frame in new tab/window
[23:06:18] <fenn> you cant even click "back" in mcmaster
[23:06:23] <ds2> JymmmEMC: have you tried it with McMaster's website?
[23:06:38] <JymmmEMC> ds2: yes, that's what I was talking about
[23:06:47] <ds2> JymmmEMC: it gives me a blank tab
[23:07:00] <JymmmEMC> ds2: stop tweaking your browser
[23:07:09] <eric_u> it' lets you open two copies of their website
[23:07:42] <ds2> then there is the annoying part where they make the "hot" spot huge so I can't change focus w/o clicking on something GRRRR
[23:07:53] <ds2> JymmmEMC: what browser does that work on?
[23:07:55] <JymmmEMC> ds2: http://www.mcmaster.com/param/asp/PSearch2.asp?reqTyp=parametric&act=psearch&FAM=nails&FT_4565=201254&session=nails;4565=201254&sesnextrep=71405565330962&ScreenWidth=1600&McMMainWidth=775
[23:08:09] <JymmmEMC> works for me in FF
[23:08:16] <JymmmEMC> and for jmkasunich too
[23:08:32] <ds2> half the links are javascript
[23:08:43] <ds2> you must be doing it on the left frame
[23:08:50] <JymmmEMC> nope
[23:09:12] <JymmmEMC> bottom right frame
[23:09:17] <eric_u> I wish digikey worked half as well as mcmaster, but to each his own
[23:16:24] <Ziegler> /server irc.chatster.org
[23:16:33] <Ziegler> 0_0 oops
[23:22:21] <Roguish> ok, got it. check: https://launchpad.net/ubuntu/+source/mesa/+bug/29435
[23:23:10] <Roguish> did this: "dpkg -r --force-depends mesa-common-dev" followed by "apt-get install mesa-common-dev" restored it on the system
[23:24:25] <Roguish> and got a compile on emc2-trunk. THANKS ALL (fenn, swpadnos, et. al.) for the help.
[23:25:47] <SWPadnos> excellent
[23:25:56] <Roguish> looks like it is a problem in a breezy to dapper upgrade.
[23:26:49] <Roguish> by the way. i think mcmaster is by far one of the best and most usable websites around.
[23:28:17] <SWPadnos> I can't stand it :)
[23:28:33] <SWPadnos> it's better than Mouser, worse than digi-key, and about on par with MSC
[23:28:43] <SWPadnos> though the pictorial choices are nice a lot of the time
[23:29:18] <jmkasunich> Mcmaster is great for a single person to use, but it's a PITA to post a link to it on IRC
[23:30:00] <Roguish> hey what's the deal with ati and nvidia? do they both hate linux? what a pita this graphics thing is.
[23:30:02] <SWPadnos> there are issues with comparing different things as well. middle-click works very well on digikey, mouser, and MSC
[23:30:22] <SWPadnos> from recent announcements, ATI/AMD may not hate Linux any more
[23:30:33] <SWPadnos> but we'll have to wait and see I think
[23:30:56] <tomp2> can m5i20 sink 5mA when signal src is from +24V= ? http://imagebin.org/10342
[23:31:08] <Martini> what part of ubuntu do i need to be in to make a xml file?
[23:31:14] <SWPadnos> 48V 1A or something, I think
[23:31:32] <Martini> trying an example in the pyvcp documentation
[23:31:34] <jmkasunich> tomp2: 5i20 can't handle anything over 5V
[23:31:52] <jmkasunich> the 7i37 isolated output card can do 48V 1A I believe
[23:31:52] <Roguish> don't go over 5v for sure.
[23:32:08] <tomp2> thanks, thats important :) recommend any level shifters?
[23:32:09] <Roguish> 7i37 works very well. got 2 of them.
[23:32:18] <SWPadnos> oh - right. I was thikning of the isolated I/O card
[23:32:46] <jmkasunich> 7i37 takes one 24 signal cable from the 5i20 and gives you 16 isolated ins and 8 isolated outs
[23:32:59] <jmkasunich> if you need a different mix (more outs) it gets tougher
[23:33:13] <tomp2> tomp looks at 7i37 , thanks
[23:39:11] <tomp2> btw: the 50 pin breakout from DAQstuff uses terminal strips that are vertical and close together (2x25). This kind of strip has the entrance horz at .05 from boards surface and has a metal 'spring' that the screw presses against your wire. You cant get tiny wires to move the spring and gain entrance. I made a tool to bend them so i could get the wires in.
[23:43:29] <tomp2> no way to order mesa on line? well, maybe the phone call will find prices on the 'snap on terminal strips' for the 7i37T
[23:44:09] <tomp2> bye for now, thanks