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[02:49:38] <memleak> "It seems like Alec is—or should be—friends with jepler."
https://osrc.dfm.io/ntulinux/
[02:50:15] <memleak> interesting..
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[15:02:21] <KGB-linuxcnc> 03Sebastian Kuzminsky 052.6 7d84e80 06linuxcnc 10(20 files in 2 dirs) hm2 sample config: set HOME_SEQUENCE * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=7d84e80
[15:02:54] <KGB-linuxcnc> 03Sebastian Kuzminsky 05master ebedd0a 06linuxcnc Merge remote-tracking branch 'origin/2.6' * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=ebedd0a
[15:03:01] <cradek> seb_kuzminsky: I hear the hm2-stepper configs should be using pid...
[15:03:28] <cradek> you touched 'em last
[15:24:56] <skunkworks_> your it!?
[15:25:01] <skunkworks_> you're
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[16:27:10] <seb_kuzminsky> cradek: noted
[16:28:01] <cradek> thanks for doing that
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[17:52:55] <kwallace1> Are there pogo pin sets for dual row headers or do I have to drill and set each one?
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[18:13:37] <PCW_> I have an example pid stepper config
[18:13:39] <PCW_> the ini files will need to have the PID parameters added
[18:15:33] <cradek> if it doesn't need tuning (I hope it doesn't) we could just hide them in the hal file
[18:15:39] `Nerobro_ is now known as `Groot
[18:17:09] <PCW_> yeah FF1=1 P=100 FF2=.somethingreallysmalthat'snottooimportant
[18:18:59] <PCW_> oh and for Ethernet I set a small maxerror
[18:20:23] <PCW_> so for large latency spikes it switches to fixed slew correction rather than proportional
[18:22:34] <PCW_> ultimately for things with poor jitter I should add the option of DPLL sampling of the encoder and stepgen positions
[18:22:36] <PCW_> (as is already done for SISS, BISS and Fanuc encoders)
[18:23:41] <PCW_> sample say 50 usec before the DPLL read baseline
[18:29:14] <PCW_> kwallace1: I always just drilled out a blank PCBs for the pogo pin support
[18:29:16] <PCW_> (using 2 PCBs one with normal hole for the pogo tail and one (spaced away from the first)
[18:29:17] <PCW_> drilled out for the shaft
[18:29:27] <jepler> PCW_: is the widest freerunning counter on hm2 the 16-bit one that is used for encoder timestamping?
[18:30:07] <PCW_> the DPLL has a 32 bit non freerunning counter
[18:30:39] <PCW_> (that can be freerunning if the feedback gains are set to 0)
[18:30:58] <PCW_> also the stepgen is a 32 bit counter
[18:31:08] <jepler> ah that should have been obvious
[18:31:39] <jepler> I am thinking that since I trust hm2, I should repeatedly read a timestamp from it
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[18:32:20] <PCW_> yeah there really should be a default timer
[18:32:25] <jepler> I mean, to confirm these large latencies I see from spidev transactions
[18:33:00] <jepler> I can set stepgen going at 1MHz, then do say 4 spidev transactions each reading the counter
[18:33:14] <jepler> if the counter difference is really big then I know I had a real latency
[18:33:21] <jepler> this is a testing thing, not an everyday thing
[18:33:27] <PCW_> Yep, actually 10 MHz is possible
[18:33:47] <PCW_> eventually I think the DPLL will be standard
[18:34:27] <PCW_> so latency relative to the baseline is always acquired
[18:36:05] <jepler> my latest results are that if I do CPU-bound things (repeatedly summing an array of ints) for a similar amount of time that an SPI transaction takes, I also get the ~300us tmax spikes, so whatever problem I'm left with is not actually specific to spidev
[18:36:45] <jepler> the linux clock source that can be used for high-resolution timestamping and sleeping, "CLOCK_MONOTONIC" is subject to adjustements by NTP and other sources
[18:37:08] <PCW_> maybe just the limits of standard kernel drivers (thats similar to Ethernet)
[18:37:57] <jepler> oh, 300us 1-cycle time spikes are seen with preempt-rt but linuxcnc deals OK with it?
[18:38:28] <PCW_> yeah not a problem (and can be much improved by using the DPLL)
[18:39:38] <PCW_> (for input sampling time generation)
[18:42:49] <PCW_> The only issue I see is that the following error must be widened to accommodate the
[18:42:51] <PCW_> position jitter at high speeds cause by the input sampling time error
[18:42:52] <PCW_> (sampling with the DPLL will fix most of this)
[18:42:54] <jepler> hm, now how big will a transaction be with 3 stepgens enabled
[18:43:22] <jepler> in particular, will it be at or under the 16-word limit in order to avoid doing DMA
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[18:43:34] <PCW_> depends on how efficient the driver is...
[18:43:36] <jepler> (I *think* that doing DMA was still introducing bigger latencies than not doing it)
[18:44:12] <PCW_> if it has to poke at the (shared) DMA controller that might be an issue
[18:44:51] <jepler> yes, it looks like it's written so that it acquires the dma controller at each transaction
[18:45:18] <jepler> so a change I'm contemplating making is moving the "claim" of the dma controller to the time the device is registered
[18:45:48] <jepler> I think my datasheet said there are 8 DMA controllers that can work with the SPI module so if that's right, camping on one should be OK in terms of letting the rest of the system work
[18:46:53] <PCW_> Hey the Jetson has a SPI port...
[18:47:16] <jepler> do you have a jetson? someone else was talking about that board as well
[18:47:39] <PCW_> nah was just looking at the schematics
[18:47:42] <jepler> ah
[18:49:06] <PCW_> has a bunch of GPIO and a SPI port on the touch screen interface connector
[18:49:37] <PCW_> looks nice, too bad its from nvidia
[18:52:57] <PCW_> its funny to watch the DPLL track latency (baseline shift) when you move the mouse
[18:52:58] <PCW_> total baseline shift is ~20 uSec (over ~500 ms so only about 40 ns/thread slew)
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[18:54:30] <jepler> you mean it's an accumulating error of 40ns per servo period?
[18:54:39] <jepler> I'm sad if there's accumulating timing error
[18:54:59] <jepler> this is with the uspace branch?
[18:55:47] <PCW_> Yes uspace and no, its tracking the average latency
[18:56:15] <jepler> oh, it takes 500ms to track the ~20us change in latency ?
[18:56:38] <PCW_> Yes (about and depending on tuning)
[18:56:57] <jepler> now that I understand what you were saying, that sounds good
[18:57:23] <PCW_> 20 usec _average_ change in latency
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[19:47:23] <kwallace1> PCW_, Thanks for your reply. Even with existing holes that's a lot of drilling, but it needs to be done just once. There is a lot of soldering to do too. It would have been nice to have the tester interface board have all the connectors, interface chips and pogo pin layout on one board, but it didn't work out that way. Things could be worse I suppose.
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[20:02:29] <PCW_> The old way was to use the drill file, drill plexiglass or blank fr4 and use individual wires with .025" receptacles
[20:04:02] <PCW_> a Excellon drill file should be massageable into a useable gcode file
[20:08:19] <cradek> yeah that looks pretty darn easy
[20:09:40] <cradek> remove some crap, stick a g81 at the top, scale the numbers or insert decimal points
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[20:11:10] <cradek> the LZ/TZ thing is silly
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[20:46:54] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 5f9974c 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: don't enable the watchdog in hm2_read() and hm2_read_gpio() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=5f9974c
[20:46:54] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 3fd02ac 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: write the watchdog in hm2_write_gpio() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=3fd02ac
[20:46:54] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 613759f 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c 10src/hal/drivers/mesa-hostmot2/hostmot2.h 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: simplify how "watchdog period is short" warning is printed * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=613759f
[20:46:58] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog b05541d 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: simplify auto-enabling of the watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=b05541d
[20:47:03] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 043a0a2 06linuxcnc 10src/hal/drivers/mesa-hostmot2/hostmot2.c 10src/hal/drivers/mesa-hostmot2/hostmot2.h 10src/hal/drivers/mesa-hostmot2/watchdog.c hm2: move watchdog petting from pet_watchdog() * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=043a0a2
[20:47:07] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 0b48bda 06linuxcnc 10docs/man/man9/hostmot2.9 10docs/src/drivers/hostmot2.txt 10src/hal/drivers/mesa-hostmot2/hostmot2.c hm2: remove pet_watchdog from the docs * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=0b48bda
[20:47:12] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 858eb48 06linuxcnc 10configs/by_interface/mesa/hm2-servo/hm2-servo.hal 10configs/by_interface/mesa/hm2-stepper/hm2-stepper.hal 10configs/by_interface/mesa/plasma-5i20/plasma-5i20.hal hm2 configs: dont call pet_watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=858eb48
[20:47:17] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 427fba5 06linuxcnc 10(12 files) smithy configs: dont call pet_watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=427fba5
[20:47:21] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog c68f379 06linuxcnc 10(8 files) smithy configs: dont call hm2 read_gpio/write_gpio * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=c68f379
[20:47:25] <KGB-linuxcnc> 03Sebastian Kuzminsky 05seb/master/hm2-watchdog 47b3e95 06linuxcnc 10src/emc/usr_intf/pncconf/pncconf.py pncconf: dont use hm2 pet_watchdog * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=47b3e95
[20:53:12] <PCW_> Yeah!
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[20:56:17] <jepler> > Your boards have been depanelized and shipped to you via via United States: Free Shipping
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[20:58:36] <PCW_> adding ICAP support to the 7I90EPP and SPI configs
[20:59:27] <jepler> that's the thing that allows "rebooting"?
[20:59:41] <PCW_> yes and should eventually make testing new firmware a bit safer
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[21:00:11] <PCW_> the 7I90 already allows re-config from host command
[21:00:37] <PCW_> so its not such a big deal as it is on the 7I80 and 5i25/5i24
[21:01:04] <micges> seb_kuzminsky: great!
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[21:01:44] <seb_kuzminsky> well, let's see if it works this time :-)
[21:02:01] <seb_kuzminsky> micges: did you get the mesaflash patch i sent you for building on lucid?
[21:03:06] <micges> I got it, but I don't get to mesaflash coding yet, I hope today is the day
[21:03:14] <seb_kuzminsky> ok
[21:03:28] <seb_kuzminsky> PCW_: could you attach your hm2 stepper pid config to #392 on sf?
[21:03:33] <PCW_> the nice thing about ICAP is that eventually you can test a config by loading it in the fallback area and launching it from there
[21:03:35] <PCW_> so even ifs its a bad bifile and you lose card access, a simple power cycle will recover
[21:04:05] <jepler> PCW_: hm, on 7i90 I'm imagining one basic FW which would just support ICAP "rebooting" but over all 3 connection methods..
[21:04:54] <PCW_> we now are using a bigger common EEPROM for all cards so there room for 4 configs in one EEPROM
[21:05:06] <micges> PCW_: hmm so I need to add flag to mf to select if you want reboot to user area or fallback area
[21:05:24] <PCW_> Eventually
[21:06:07] <PCW_> This would make testing bitfiles on 5I25s (or 7I92S) that have only one EEPROM much safer
[21:07:19] <PCW_> actually the 7i90 has 4 connection methods (but 1 is not a HM2 slave)
[21:08:02] <jepler> spi, serial, epp, ?
[21:08:13] <PCW_> ssremote
[21:08:28] <jepler> oh lbp and lbp16 are two distinct things .. ok
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[21:50:11] <PCW_> The configs are different, hm2_ser is just a serially accessed hostmot2 confg almost identical to hm2_eth
[21:50:12] <PCW_> ssremote is a serial remote I/O device that works with the sserial driver on the host (currently just provides 72 I/O bits)
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[22:39:44] <skunkworks> walnut trees play havoc to gardeningJHFFJVBOHIPYN
[22:39:54] <skunkworks> ,|
[22:39:55] <skunkworks> \
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