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[01:26:52] <jepler> using double-precision floats without the atomicity guarantee is only slightly worse than using floats when you get bit by the lack of atomicity, and is better the rest of the time
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[01:59:42] <dgarr> better news than the amd machine, got a hp dc7800 on ebay (i'd seen recommendation by kwallace) and loaded 3.4.55-3linuxcnc, built linuxcnc master and it seems to run ok
http://www.panix.com/~dgarrett/stuff/3.4.55-3linuxcnc.png
[02:01:11] <dgarr> i also installed a preempt-rt kernel and built jepler/rtos-uspace-apis and it seems good as well:
http://www.panix.com/~dgarrett/stuff/uspace-rt.png
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[02:11:20] <jepler> dgarr: thanks for that feedback
[02:13:33] <dgarr> no problem, thanks for uspace work
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[02:39:13] <skunkworks> logger[psha]:
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[02:45:19] <skunkworks> http://electronicsam.com/images/KandT/testing/DSC_1915.JPG
[02:45:24] <skunkworks> starting to look like
[02:46:06] <skunkworks> http://electronicsam.com/images/KandT/testing/Screenshot%20from%202014-06-23%2010:32:46.png
[02:46:34] <skunkworks> start with a 5.5 inch shaft... remove everything that doesn't look like the drawing..
[02:47:23] <skunkworks> all the manual stuff is done (lathe work) now I can slap it on the k&t and do the rest
[02:49:42] <skunkworks> http://electronicsam.com/images/KandT/testing/DSC_1917.JPG
[02:55:14] <dgarr> jepler, fwiw my amd machine that runs old rtai but has problems with new rtai has poor latency with preempt_rt and rtos-uspace-apis:
http://www.panix.com/~dgarrett/stuff/uspace-rt.png
[02:56:14] <dgarr> oops, link is
http://www.panix.com/~dgarrett/stuff/amd_uspace_rt.png
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[03:05:09] <pcw_home> dgarr: pretty sure you will have to disable the base thread to get meaningful results from preemt_rt
[03:06:33] <pcw_home> (the default 25 usec base thread period is probably about twice preemt_rt's latency)
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[03:10:25] <skunkworks> it seems also that nvidia is less tollerated now.. (2 videos - one onboard and one pcie that both ran decent on 10.04 don't run well with latest rtai image.
[03:11:00] <pcw_home> well the driver as probably been improved
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[03:15:52] <dgarr> pcw_home: yes but this one is preempt_rt with uspace:
http://www.panix.com/~dgarrett/stuff/uspace-rt.png
[03:18:33] <pcw_home> I still think you need to turn of the base thread
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[03:19:03] <CaptHindsight> 3.12.22-rt34 was running ~32uS, getting closer to 25uS
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[03:23:23] <dgarr> you are probably right but the machine is off now
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[03:26:35] <skunkworks> http://electronicsam.com/images/KandT/testing/IMG_20140626_174011_685.jpg
[03:27:17] <seb_kuzminsky> skunkworks: i like the blue chips. and the freecad model
[03:27:37] <skunkworks> seb_kuzminsky: my first freecad drawing..
[03:27:53] <seb_kuzminsky> it's getting totally usable, imo
[03:28:10] <seb_kuzminsky> i'm looking forward to the assembly module and the cam module :-)
[03:28:26] <skunkworks> sure - I just have never used parametric cads before...
[03:29:08] <skunkworks> there are some anoying things.. like working in english - some things like array type operations are only metric (cannot even put " behing them)
[03:29:20] <skunkworks> behing
[03:29:22] <skunkworks> jeeze
[03:29:25] <skunkworks> behind
[03:30:17] <skunkworks> I suppose I should just work in metric...
[03:30:35] <seb_kuzminsky> then it would match pycam, which is also in metric ;-)
[03:31:21] <skunkworks> but the k&t has english ball screws!
[03:31:36] <seb_kuzminsky> good thing it runs linuxcnc which handles both ;-)
[03:32:25] <skunkworks> the blue chips where all over the shop...
[03:32:36] <skunkworks> (I have a few burn marks on my arms...)
[03:32:39] <seb_kuzminsky> i bet!
[03:32:57] <seb_kuzminsky> i like the impromptu shim stock
[03:33:00] <seb_kuzminsky> what's the crank for?
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[03:33:54] <skunkworks> I am working on a stirling engine - I need a test bed to play with head shapes..
[03:34:38] <skunkworks> I am converting a old 2 cylinder air compressor - So I need to adjust the crank so it will be 90deg out of phase instead of 180..
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[03:36:15] <skunkworks> the way the air compressor is built - I can just sort of cut off one side. make a new replacement that I can bolt together 90deg out.
[03:37:11] <skunkworks> (crank)
[03:38:00] <skunkworks> which is good because that side of the crank journal was gulled.
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[04:22:02] <CaptHindsight> ok, new test system working, 3.4.55 RTAI on Mint Mate 17 that uses the Trusty repos latency is >80K, same system with LiveCD <6K
[04:25:08] <CaptHindsight> used
http://buildbot.linuxcnc.org precise master-rt
[04:25:47] <CaptHindsight> and had to use some older packages from precise liboost-python and 2 others
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[04:31:30] <seb_kuzminsky> wow, that's terrible!
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[04:37:38] <CaptHindsight> installing Mint Debian Mate now
[04:43:31] <CaptHindsight> based on Debian Testing
[04:46:23] <CaptHindsight> gotta love these 10 minute installs
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[05:02:37] <seb_kuzminsky> what video card is in use?
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[05:11:11] <CaptHindsight> AMD APU integrated
[05:12:39] <CaptHindsight> ok it needs libboost-python1.46.1, the command line says >= but a higher version is already installed
[05:14:41] <CaptHindsight> also wants libgnomeprint and libgnomeprintui
[05:16:35] <CaptHindsight> seb_kuzminsky: this is on a A10 6800K quad core 4.4ghz and 85x chipset (Gigabyte F2A85X-UP4)
[05:17:19] <seb_kuzminsky> yeah, libgnomeprint is an obstacle to supporting trusty....
[05:21:49] <CaptHindsight> I'm trying it with those packages added
[05:22:02] <CaptHindsight> just a few minutes for results
[05:32:09] <CaptHindsight> same behavior in Mint Debian Mate (debian testing) now at 150K when I max a glxgears window
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[05:33:52] <CaptHindsight> I'll install ubuntu precise and debian wheezy tomorrow and anything else you'd like to try
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[07:27:32] <CaptHindsight> this is odd, I just installed precise with 3.4.55 RTAI2 and master-rt and the latency is just as bad as both versions of Mate
[07:28:23] <CaptHindsight> I usually use v2.5_branch-rt without any problems, maybe master-rt is the problem?
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[11:10:21] <logger[mah]> micges-dev: Log stored at
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[14:24:57] <cradek> jepler: thanks for doing that analysis. The reasoned results are different from my knee-jerk thoughts.
[14:25:59] <jepler> it's right up my alley
[14:28:09] <jepler> of course, I wish there were an easy way for it to be 100% right
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[14:56:24] <ssi> hm... you guys ever seen BeRTOS?
[14:56:51] <ssi> http://dev.bertos.org
[14:56:53] <pcw_home> is that related to ErnieOS?
[14:57:00] <ssi> not legally ;)
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[15:13:52] <seb_kuzminsky> cradek: it amazes me how short & simple the multi-tlo branch is, for how much functionality it offers
[15:14:33] <seb_kuzminsky> it's so straight forward once you frame the problem the way you did
[15:15:08] <seb_kuzminsky> it needs docs, then it's ready to merge i think
[15:15:40] <cradek> andy's doing the hard part figuring out the remap...
[15:16:09] <cradek> haha now chris morley says there's such a thing as T010101
[15:16:27] <cradek> but of course you can twiddle the remap to handle that if you want...
[15:16:58] <seb_kuzminsky> we're doing binary tool numbers now??? ;-)
[15:17:20] <skunkworks> that is what the k&t does.. ;)
[15:17:29] <cradek> I thought those are octal
[15:17:43] <skunkworks> originally - but I just used strait binary
[15:18:29] <skunkworks> hmm - maybe it would be easier to call the tool with strait binary.. Then you would not have to convert.. Just 15 1/0...
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[15:28:03] <pcw_home> hmm looks like a sserial bug with bit arrays > 64 bits
[15:41:11] <CaptHindsight> have to track down why 3.4.55 RTAI on Gentoo works just fine on a A8 cpu+ a85 chipset yet is poor with Precise and same kernel
[15:42:04] <pcw_home> tons of added crap?
[15:42:46] <pcw_home> video driver different?
[15:42:56] <CaptHindsight> it's odd I changed over to the linuxcnc 2,5 repos from master with Precise and the problem remained
[15:43:27] <CaptHindsight> we'll do some drive swapping over the weekend between working systems
[15:43:59] <pcw_home> find the rat dropping in the capers...
[15:44:56] <CaptHindsight> this is the same cpu and chipset that memleak used for all the RTAI development
[15:45:29] <CaptHindsight> liveCD works just fine
[15:45:29] <pcw_home> does wheezy have the same issue?
[15:46:03] <pcw_home> old 10.04 livecd?
[15:46:17] <CaptHindsight> tried Mint in both Ubuntu and debian flavors plus ubuntu precise last night, all behave the same
[15:47:40] <seb_kuzminsky> CaptHindsight: latency comes from the interaction of the rtai kernel and the hardware - which branch of linuxcnc you use shouldn't matter
[15:47:44] <CaptHindsight> yes, it's been running the 10.04 livecd with the 2.6.32 the past 6 hours with latency <8K
[15:48:44] <CaptHindsight> seb_kuzminsky: ok, I wasn't sure since I was using 2.5 vs master the past few months, and my testing last night was with master
[15:50:06] <CaptHindsight> I'm going to put this drive into memleaks dev system later and see what it does there
[15:50:45] <seb_kuzminsky> it makes me unhappy that the new rtai kernel performs worse than the previous one
[15:52:03] <CaptHindsight> 3.4.55 RTAI has been fine for me on the Asrock E350M1's (embedded APU)
[15:52:18] <skunkworks> depends on the hardware.. I now have seen pcie video cards that worked fine on 10.04 don't work fine on wheezy
[15:52:39] <CaptHindsight> we built a bunch of systems that are just fine
[15:52:55] <pcw_home> I would suspect the video driver next after the kernel
[15:53:31] <skunkworks> (nvidia
[15:53:32] <skunkworks> )
[15:53:55] <pcw_home> eww
[15:54:35] <CaptHindsight> yes, we'll be comparing drivers and BIOS settings etc
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[16:22:15] <cradek> seb_kuzminsky: I'm working on the docs. Although I admit it's a new feature, I think this change is both useful and safe enough to consider sneaking it into 2.6.
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[16:25:51] <KGB-linuxcnc> 03Chris Radek 05cradek/multi-tlo d79902d 06linuxcnc 10docs/html/gcode.html G43.1 works with all axes, not just XZ now * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=d79902d
[16:25:51] <KGB-linuxcnc> 03Chris Radek 05cradek/multi-tlo f3f8bb7 06linuxcnc 10docs/html/gcode.html 10docs/src/gcode/gcode.txt Documentation for G43.2 * 14http://git.linuxcnc.org/?p=linuxcnc.git;a=commitdiff;h=f3f8bb7
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[16:57:45] <skunkworks> I don't seem to have any video cards here that support 3 monitors...
[16:57:56] <skunkworks> that was somewhat suprising...
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[16:59:39] <pcw_home> There were some really old ones that supported 4 or more (for Bowling alleys etc)
[17:02:17] <skunkworks> ton of cards that have dvi/hdmi/vga - but you can only use 2 of the 3 at once.
[17:02:41] <cradek> can't you just use two cards?
[17:02:57] <cradek> or is that passe?
[17:03:15] <pcw_home> Yeah you should be able to use as many cards as you have slots
[17:03:26] <skunkworks> we tried every combination that we could think of.. No sucess...
[17:03:26] <pcw_home> http://www.matrox.com/graphics/en/products/graphics_cards/m_series/m9188pciex16/?utm_campaign=060710_InfoComm_Graphics_Pulse_link_octal&utm_medium=Newsletter&utm_source=InfoComm&utm_content=octal
[17:03:59] <skunkworks> pci/pci-e, pci/pci - same brand / different brands.. no luck.
[17:04:08] <skunkworks> they did not play well together
[17:04:22] <pcw_home> driver limitation?
[17:04:52] <skunkworks> no clue.. some blue screen - some just didn't boot.
[17:05:17] <pcw_home> probably confused the BIOS
[17:05:30] <skunkworks> picked up a 100 dollar card from best buy that supports 3 (hopefully)
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[17:32:30] <pcw_home> I guess I'll make data 3x24 bits instead of 72 bits to work around the sserial driver limitation
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[18:38:39] <skunkworks> well - that didn't work. But a 2 head card + old s3 pci card seems to work. go figure
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[20:09:19] <cradek_> andypugh: thanks for working on the remap!
[20:09:28] <cradek_> argh my underscores
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[20:09:57] <andypugh> I will push the sample config in a few minutes. I want to set a job going on the mill.
[20:10:15] <andypugh> Actually, make that in an hour or so, probably.
[20:10:20] <cradek> cool
[20:10:29] <cradek> I did the docs today
[20:11:09] <cradek> I'd like to convince seb it can go in 2.6, but I don't know what he thinks yet
[20:11:36] <cradek> the (non remap part) changes are very simple
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[20:15:07] <andypugh> I would like to see it there. Even I am unlikely to break anything with a sample config.
[20:21:34] <andypugh> There might be an artificial and unnecessary conflation here. The lathe-style remap might still be useful even without compound offsets.
[20:22:13] <andypugh> T0201 could still be parsed as M6 T1 G43 H2 in the current version.
[20:22:18] <cradek> I agree
[20:23:00] <andypugh> Today was the first time I have seen mention of the Okuma T030201 format.
[20:23:05] <cradek> but my larger goal is to make that patch unnecessary by giving a flexible superset of what it does
[20:23:16] <andypugh> (which could extend indefinitely if you wanted to)
[20:23:33] <cradek> yeah me too. and this scheme is plenty flexible enough for it, so yay
[20:24:30] <andypugh> O100 if [#<tool> GT 0] ; Carry on adding offsets as long as you like
[20:25:12] <cradek> I love it
[20:26:48] <andypugh> I might even start using it. But I think I would change around the “encoding” with 01 being tool 1 base, 0100 being tool-wear 1, 010000 being an offset just for fun. :-) The 10001 as wear-1, 10002 as wear-2 scheme seems silly and non-obvious.
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[20:41:16] <cradek> I think aram switched from m5i20 to hm2, didn't hook up any of his inputs right, and therefore has decided his cd download was bad
[20:41:49] <andypugh> He’s Stuart’s problem this time.
[20:42:02] <cradek> stuart has tried to help him for years :-/
[20:42:10] <cradek> they used to talk on the phone a lot
[20:43:30] <andypugh> He must be simply a nicer person than me.
[20:44:05] <cradek> you tried harder than most folks have
[20:44:33] <PCW> Ahh that must be the reason fr the limit switches not working (not hooked up in the sample config)
[20:44:42] <cradek> it's only a guess
[20:44:56] <cradek> I do suspect he's trying to change from m5i20 to hm2
[20:45:01] <cradek> ... but he didn't say so
[20:46:08] <cradek> I've made that change and it's actually relatively hard to redo all your ins and outs properly. the m5i20 driver had much more obvious pin names because it supported only one configuration of daughter cards.
[20:46:35] <PCW> yeah
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[20:48:49] <andypugh> Clearly Seb is a bad person for not keeping the m5i20 names as aliases for the new pins.
[20:49:17] <andypugh> (actually, punting Aram a hal file of pin aliases probably _would_ fix it for him).
[20:49:20] <cradek> we didn't have aliases at that time, but I think it was one of the reasons we came up with aliases
[20:49:47] <andypugh> If only he hadn’t annoyed me so much I might even have done it for him.
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[20:50:06] <cradek> well it's not just that - you have to set ins and outs and pullups and pwm rates and whatever all else, after reading the applicable manuals
[20:51:03] <cradek> it's more flexible now - that's a mixed blessing to users
[20:51:10] <cradek> eh
[20:51:25] <andypugh> Right! To the Workshop!
[20:51:36] <cradek> he has no idea even what the problem is he's facing
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[20:54:31] <PCW> Got a working sserial remote as a 7I90 config (changed the I/O to x24 bits instead of 1X 72 because of sserial driver limitations)
[20:56:07] <PCW> the code is quite dreadful but it makes a cheap remote 72 bit IO for 3X Opto22 etc
[20:56:39] <PCW> even has similar blinklights
[20:58:35] <PCW> and uses HostMot2 as I/O so any HostMot2 function can be added (but with difficulty as the process data I/O has to be hand written)
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[21:02:24] <micges-dev1> PCW: that's great!
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[21:03:35] <micges-dev> PCW: now 7i90DB ;)
[21:05:14] <PCW> Have to finish the 7I92 and 6I24
[21:06:24] <PCW> and its a (terrible but public) example of working ss remote code
[21:06:41] <micges-dev> but it would be sane to have DB sserial remote boards?
[21:06:59] <PCW> not so much
[21:07:10] <PCW> for EPP sure
[21:07:19] <PCW> (or SPI)
[21:07:46] <micges-dev> right
[21:08:53] <PCW> currently is just plain I/O (active low) , theres a limit to what you can do with 96 bits and 2.5 M Baud
[21:09:45] <PCW> its setup for 72 bits in 72 bits out open drain mode (for OPTO 22 etc)
[21:10:32] <jepler> PCW: you think this 64-bit thing is a bug in the linuxcnc driver, or elsewhere in the chain?
[21:10:36] <PCW> only one mode (but since I understand it (unlike the PIC code) I can easily add more)
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[21:11:47] <micges-dev> PCW: not much to add becouse as I understand you don;t have such low level access to read voltage levels or such
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[21:12:49] <PCW> Its not so much a bug as a limitation (using 64 bit numbers and shifts instead of bit arrays)
[21:12:51] <PCW> I just changed the IO from in 0..71 to P1-In 0..23, P2-In 0..23 P3-In 00.23 etc
[21:13:17] <jepler> at the hal level, we still haven't come up with a good abstraction for an array
[21:14:09] <PCW> This is just internal (unpacking data into bits and vice versa)
[21:15:05] <jepler> ah such as loops like this
[21:15:05] <jepler> for (b = 0 ; b < conf->DataLength ; b++){
[21:15:08] <jepler> buff |= ((u64)(*pin->bit_pins[b] != 0) << b)
[21:15:11] <jepler> ^ ((u64)(pin->invert[b] != 0) << b);
[21:15:14] <jepler> }
[21:16:18] <PCW> Yep set bit 64 and you find that bit 0 and 64 get set
[21:18:15] <PCW> not an important issue ATM
[21:18:17] <PCW> I even think I discussed it with Andy a year or 2 ago and of course said:
[21:18:19] <PCW> why would we ever need more that a 64 bit bit field?
[21:21:00] <jepler> you said something about a limit of 96 bits too, where does that come in?
[21:21:05] <PCW> One good thing is that I learned our manual description of the protocol sucks
[21:21:07] <PCW> so I will add the missing bits I had to root around in the SSLBP source for
[21:22:01] <PCW> 96 is the current hardware limit but the protocol limit is 255 bits
[21:22:26] <PCW> (for data of type "bits")
[21:23:44] <PCW> the 96 is not likely to change until I add autobaud to SSLBP so 10 Mbit/sec remotes are supported
[21:24:48] <PCW> so not for a long time
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[21:50:41] <jepler> by now, somebody must have written the header-only "library" to access bit oriented streams
[21:50:56] <jepler> we just need to find it and stick it into the sserial code
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[22:05:52] <CaptHindsight> tried that same hard drive in another machine and precise 3.4.55 RTAI and Mint Mate Debian is just fine
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[22:10:20] <CaptHindsight> Mint 17 (Trusty repos) also works with just slightly worse times 13K vs 8K
[22:11:57] <CaptHindsight> so Ubuntu Trusty should work as well
[22:13:36] <CaptHindsight> this is on an older Phenom II 3 core 2.8GHz cpu and AMD 780 chipset with integrated graphics
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[22:14:29] <CaptHindsight> now to track down why the A10 4-core 4.4GHz APU with A85X chipset doesn't like 3.4.55 RTAI
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