#linuxcnc-devel | Logs for 2012-02-14

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[00:24:44] <jepler> it probably makes the most sense to deal with 3 32-bit registers, since they come in as 32 bits and go out as 32 bits
[00:28:47] <jepler> something like: http://pastebin.com/raw.php?i=Gjtd50Ep
[00:28:58] <jepler> (untested, of course)
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[07:07:52] <CIA-6> 03mhaberler 07v2.5_branch * reb4b2608869e 10/src/hal/user_comps/gladevcp.py: gladevcp/8.04 compat: apply Gtk bug workaround for gtkrc files only to GtkBuilder files
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[07:09:59] <mhaberler> sorry about that one - needed for backwards compatibility of demos on 8.04
[07:12:54] <CIA-6> 03mhaberler 07master * r20d741f973d5 10/ (7 files in 4 dirs): Merge branch 'v2.5_branch'
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[08:17:45] <CIA-6> 03mhaberler 07master * r5def65735067 10/docs/src/remap/structure.txt: docs/remap: document preview handling of remap procedures
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[11:54:22] <CIA-6> 03jthornton 07v2.5_branch * r529e6ed49ff8 10/docs/src/gcode/ (gcode.txt gcode_de.txt gcode_es.txt gcode_pl.txt): Docs: fix typo
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[18:21:45] <CIA-6> 03tissf 07v2.5_branch * rbac677adcae0 10/docs/src/ (5 files in 3 dirs): French docs: update - some explanation for G64
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[21:33:13] <CIA-6> 03mhaberler 07master * rd79dc9334147 10/src/emc/rs274ngc/rs274ngc_pre.cc: interp/remap: enable remapped G codes as cycles
[21:33:14] <CIA-6> 03mhaberler 07master * r13e10ab30185 10/configs/sim/remap/cycle/ (7 files in 4 dirs): interp/remap: complete demo for new cycles in Oword subs, Python
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