#emc-devel | Logs for 2007-07-27

[00:10:10] <jepler> hi jmkasunich
[00:10:23] <jmkasunich> hi
[00:22:06] <cradek> hi guys
[00:22:31] <cradek> the nominations are coming along nicely
[00:22:46] <cradek> I think a week may have been too long - they seem done now
[00:22:58] <cradek> hope people don't lose interest before voting time
[00:23:03] <SWPadnos> heh
[00:23:19] <SWPadnos> at least it's not a 18-month, $300 million election season
[00:23:28] <cradek> haha
[00:23:31] <cradek> no we're a little more sane here
[00:23:49] <SWPadnos> heh - must be the international contingent
[00:23:52] <cradek> the difference is none of us will get rich(er) and (more) powerful if we're elected
[00:24:01] <SWPadnos> hmmm - damn
[00:24:09] <cradek> we'll just have more work to do
[00:24:20] <SWPadnos> can I un-accept? :)
[00:24:49] <cradek> yeah, we're doing it wrong aren't we
[00:24:51] <cradek> oh well
[00:25:14] <SWPadnos> there are only 7 nominees at the moment - just expand the board to 7 and it's easy
[00:25:32] <cradek> yeah I briefly wondered what we'd do if we got <= 5
[00:25:37] <SWPadnos> heh
[00:25:45] <cradek> I guess we'd declare them the new board - easy
[00:25:48] <SWPadnos> draw straws for who gets to stay (or leave)
[00:29:19] <jmkasunich> <maddash> i'm merely suggesting, not complaining <---- liar
[00:29:22] <cradek> haha
[00:29:34] <SWPadnos> I suggest that his suggestions look like complaints
[00:30:05] <jmkasunich> someone needs to splain that honey/vinegar/fly thing to him
[00:30:23] <jmkasunich> preferrably his parents, they should have done that a long time ago
[00:30:58] <cradek> it has become apparent that maddash has provided -- at a minimum -- half-truths and misleading statements
[00:31:10] <cradek> (sorry)
[00:31:17] <cradek> no politics on the channel!
[00:31:27] <SWPadnos> damn
[00:31:32] <jmkasunich> it has become apparent that maddash should mostly be ignored
[00:31:46] <SWPadnos> I was just going to mention the bumper sticker "Republicans for Voldemort"
[00:33:13] <cradek> don't blame me - I voted for Roslyn!
[00:44:13] <SWPadnos> wow - 50-pin shielded flat ribbon cable is expensive
[00:44:32] <SWPadnos> like $6.79/foot
[00:46:13] <jmkasunich> why do you need the shield?
[00:46:30] <SWPadnos> this is for a power supply project using the 5i22
[00:46:43] <SWPadnos> the control PC willl be inside the main controls cabinet
[00:47:03] <SWPadnos> not where the actual H-bridges are, but still in a noisy environment
[00:58:38] <jmkasunich> unless the noise is radiated, shielding is less important than interspersed grounds and maybe some ferrite
[00:58:54] <SWPadnos> probably true
[00:59:20] <SWPadnos> I think the cable length will be quite short - 1 section of the twist/flat, or 8-10 inches otherwise
[00:59:36] <SWPadnos> actually this stuff looks good: http://www.connectworld.net/cgi-bin/iec/CAB050-RI-TW
[00:59:51] <SWPadnos> 8" between flats (or including flats)
[01:00:52] <jmkasunich> the stuff I sent you is longer, right? 16" or 24" or such?
[01:00:57] <SWPadnos> 20
[01:01:07] <SWPadnos> 18 twisted + 2 flat
[01:01:18] <jmkasunich> ah
[01:03:05] <SWPadnos> I'll be using HAL in this project, so I'll have a chance to make sure the 5i22 works (or at least that we have appropriate PIN files)
[01:03:26] <jmkasunich> oh, I missed the 22 reference
[01:03:41] <SWPadnos> only one digit off :)
[01:04:32] <SWPadnos> I'll be making some analog interface boards also - if you have suggestions about making them useful for other purposes, I'll be listening
[01:04:56] <jmkasunich> I have a specific design in mind, dunno if it would match up with what you need
[01:05:02] <SWPadnos> at the moment, I only have 2 specs: 4 or 6 channels of A/D and D/A, at 16 bit resolution
[01:05:26] <SWPadnos> I'm thinking in the other direction - if I can make the design more useful to the EMC/HA crowd
[01:05:28] <SWPadnos> HAL
[01:05:28] <jmkasunich> doesn't match
[01:05:33] <jmkasunich> I'm planning 12 bits
[01:05:44] <jmkasunich> because 12 bit converters are cheap and tiny
[01:05:52] <SWPadnos> I recall there's some SOT-23-6 part you like
[01:05:56] <jmkasunich> yep
[01:06:22] <jmkasunich> both A/D and D/A are available in that package, for $3-4 each in single piece quantity
[01:06:37] <jmkasunich> about 1MS/s
[01:06:41] <SWPadnos> hmmm. if there's a higher resolution version, and they're bipolar, I can use them
[01:07:18] <jmkasunich> not gonna find bipolar in a tiny package
[01:07:25] <SWPadnos> hmmm. true
[01:07:31] <jmkasunich> dual supplied need too many pins
[01:07:44] <SWPadnos> there are SOT-8 parts, and 8-umax
[01:08:44] <jmkasunich> there is 16 bit unipolar in a sot23, for $4.50
[01:08:58] <jmkasunich> http://www.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=296-12966-1-ND
[01:09:00] <jmkasunich> dunno sample rate yet
[01:09:03] <SWPadnos> unipolar=no-go in this application
[01:09:14] <SWPadnos> we've had too many problems with edge effects around zero
[01:09:14] <jmkasunich> why's that?
[01:09:47] <SWPadnos> averaging stops working, and the polarity detection circuitry (and reading it) isn't always synchronized with the analog read
[01:09:55] <jmkasunich> don't follow - if you are using a converter where the input swing is from 0 to 5, you bias the input so zero = 2.5V
[01:10:23] <SWPadnos> sure - you can compress and offset the range, but that isn't how they've done it in the past :)
[01:10:40] <SWPadnos> I can do that on this board though, so that may be OK
[01:11:07] <jmkasunich> you certainly would want to do it as close to the A/D as possible
[01:11:19] <SWPadnos> yes, especially in a noisy environment
[01:11:33] <SWPadnos> the higher the voltage range going into the chip, the happier these people are
[01:11:43] <jmkasunich> my preferred A/D front end is a diff-amp, with the "ground" end of the 2nd feedback resistor connected to the midpoint of the rail
[01:11:43] <SWPadnos> plus you can directly measure it with a scope
[01:12:33] <jmkasunich> what sample rate do you need?
[01:12:38] <SWPadnos> preferred because you like it, or preferred because it works well with unipolar supplies/A/Ds?
[01:12:50] <SWPadnos> not too fast - 10 KHz per channel
[01:13:02] <SWPadnos> 100 KHz would be nice though - I may put a slew rate limiter in the FPGA
[01:13:09] <jmkasunich> preferred because these days +/-10V A/Ds are rare, expensive, and dying out fast
[01:13:14] <SWPadnos> heh
[01:13:54] <jmkasunich> my plan for the 5i20 A/D is a 22 bit accumulator to which each sample is added, and a 10 bit sample count that is incremented each time, nominal sample rate 1MHz
[01:14:11] <SWPadnos> hmmm. the ADS1100's are I2C, so they may not be able to share a clock like you would with SPI
[01:14:24] <SWPadnos> at least, not for a parallel-load/read application
[01:14:44] <jmkasunich> so you read the 32 bit word, subtract the 10 bit count from the previous word to get the # of samples since last time, subtract the 22 bits to get the sum of those samples, then divide to get the average voltage over the period since last time
[01:14:59] <jmkasunich> the ADS1100s top out at 120 S/sec anyway
[01:14:59] <SWPadnos> sounds like a good plan
[01:15:29] <SWPadnos> duh me
[01:16:06] <SWPadnos> I foolishly selected "In Stock" on the digi-key search, and got only that series
[01:17:06] <jmkasunich> http://dkc1.digikey.com/Redirect.aspx?url=http://focus.ti.com/lit/ds/symlink/ads8343.pdf
[01:17:25] <jmkasunich> 4 channels, 16 bit, bipolar, $14ish
[01:18:03] <SWPadnos> yeah - that looks good. thanks
[01:18:20] <jmkasunich> although full scale is a maximum of +/- 5V, not 10
[01:18:42] <SWPadnos> I expect to have a buffer on the card, so scaling isn't an issue
[01:18:56] <SWPadnos> so technically I could shift as well, and use a unipolar chip
[01:19:01] <jmkasunich> worse, +/- 2.5
[01:20:04] <SWPadnos> hmm
[01:20:31] <jmkasunich> Vref = 0.5 to Vcc/2
[01:20:36] <jmkasunich> Vin = +/- Vref
[01:20:39] <SWPadnos> yep - found that
[01:20:51] <SWPadnos> checking the 8345 now
[01:21:05] <SWPadnos> oh, 8-channel version of the same thing
[01:21:17] <jmkasunich> I really think you are better off with a single ended A/D
[01:21:31] <SWPadnos> that may well be
[01:21:48] <jmkasunich> all the new A/Ds are being made on digital processes, single low supply voltage
[01:22:04] <jmkasunich> so buy a good op-amp using an analog process and use that to do the shifting and scaling
[01:22:16] <SWPadnos> they always use OP497 - I don't know why
[01:23:06] <jmkasunich> seems like a nice op-amp to me
[01:23:23] <jmkasunich> very nice actually
[01:23:38] <SWPadnos> I never looked it up - just remembered it's on all their baords :)
[01:23:41] <SWPadnos> boards
[01:23:51] <SWPadnos> maybe that's why they use it
[01:24:08] <jmkasunich> very slow, but very precise
[01:24:17] <jmkasunich> given their bandwidth requirements, slow is probably OK
[01:24:34] <SWPadnos> yep, and precise is very important
[01:24:46] <SWPadnos> $7 or so each at DK
[01:24:52] <jmkasunich> right
[01:25:06] <jmkasunich> thats only $1.75 per op-amp
[01:25:15] <jmkasunich> not bad at all for a high precision part
[01:26:28] <SWPadnos> strange - 2.5mA for the whole package, but I swear I've felt those things get warm before
[01:26:39] <jmkasunich> wish it was faster, I'd be tempted to use them
[01:26:50] <SWPadnos> 500 KHz isn't bad
[01:27:01] <SWPadnos> though 150 mV/uS isn't that great
[01:27:04] <jmkasunich> 0.05V/us slew rate
[01:27:18] <jmkasunich> 150 is typical, 50 is min
[01:27:30] <SWPadnos> ah - I'm looking at the slick-sheet page, not the datasheet
[01:27:47] <jmkasunich> the heating thing - the 2.5mA is just the quiescent current, any current into the load would also contribute
[01:27:53] <SWPadnos> true
[01:28:05] <jmkasunich> in a low Z circuit, that could be 5mA or more per channel
[01:28:54] <SWPadnos> this application had a 4-20 mA option, and I think the 0-10V mode used a resistor across the output (there's a 0-20 mA option as well)
[01:29:13] <SWPadnos> so I can see a bit more than 2.5mA for the package
[01:30:04] <jmkasunich> I've build a few of those multi-standard circuits, +/-10V, 0-10V, 0-20mA, 4-20mA (4-20 is done in software using the 0-20 hw)
[01:30:15] <SWPadnos> yep - same with this one
[01:30:51] <SWPadnos> this didn't need the bipolar option because there's a fwd/rev output
[01:36:26] <jmkasunich> so why are you looking for a bipolar adc?
[01:37:18] <SWPadnos> well, the input is +/- 10V, and there's a reluctance on the customer's part to use unipolar, due to past experiences
[01:38:08] <SWPadnos> since I can scale and shift though, that may not be a problem. the method used before was to detect the sign, and invert if negative (and run the sign bit to a digital input bit)
[01:38:29] <jmkasunich> ugly
[01:38:41] <SWPadnos> yes, and possibly why they're gun-shy about unipolar
[01:38:52] <SWPadnos> "it was dumb before, so we don't like it"
[01:57:21] <jmkasunich> http://jmkasunich.dyndns.org/pics/BipolarAD.pdf
[01:57:56] <SWPadnos> ah - thanks
[01:57:56] <jmkasunich> +/-10V, with 0V at precisely mid-scale
[01:58:04] <jmkasunich> Vref accuracy sets gain error
[01:58:11] <jmkasunich> resistor matching sets offset error
[01:58:44] <jmkasunich> all resistors are identical, best precision comes from a network where all are made at one time and share a substrate (for tempco matching and temp tracking)
[01:59:06] <SWPadnos> ok, so a multi-element respack should help there
[01:59:06] <jmkasunich> yep ;-)
[01:59:25] <SWPadnos> sorry - typing one-handed, holding food with the other :)
[02:01:21] <SWPadnos> hmmm - I wonder if htese leftovers were left over too long ago
[02:01:30] <jmkasunich> taste a little "off" ?
[02:01:39] <SWPadnos> hard to tell - it's chinese food
[02:01:47] <jmkasunich> lol
[02:02:02] <SWPadnos> I nuked it for a couple of minutes, so I suspect any beasties are dead
[02:02:13] <jmkasunich> spicy chinese like Hunan? or bland?
[02:02:19] <SWPadnos> Szechuan
[02:02:33] <SWPadnos> probably keeps for a month, so I should be OK
[03:32:57] <cradek> jepler: should M2/M30 set G97?
[03:33:52] <cradek> it does already set G94
[03:35:50] <cradek> I'm almost sure it should, but maybe I'm missing something
[04:56:03] <SWPadnos> jmkasunich, I think it's a language thing - there's a design, but he can't afford to buy it already built, so "implementation" for him is "assembly" for us
[04:56:06] <SWPadnos> as in "some assembly required"
[04:56:53] <SWPadnos> the "design" being the bbastro one (or something yet to be designed/implemented)
[05:05:40] <jmkasunich> success!
[05:06:37] <SWPadnos> heh
[12:21:01] <jepler> cradek: yes probably
[12:25:09] <jepler> good morning skunkworks
[12:25:18] <skunkworks> good morning jepler.
[12:25:31] <skunkworks> tgif
[12:25:44] <jepler> indeed
[12:27:09] <skunkworks> How is everything going? keeping busy?
[12:28:23] <skunkworks> we finally got rain here. Good inch or so - we really needed it.
[12:29:34] <jepler> oh not bad
[12:30:04] <jepler> work is alternating between "get those bugs fixed" and "for god's sake, don't change anything, you'll introduce a bug" .. today is a "for god's sake" day
[12:30:27] <jepler> we could use the rain too but it's not coming
[12:37:46] <skunkworks> We get we are changing the proccess... Need it done by yesterday.
[12:38:25] <skunkworks> 'we are changing the process'
[12:45:38] <skunkworks> although my programmer had a laugh this week when he created a bit that would tell if a certain form was open. telephone purchase order. blnTelePOOpen
[12:46:50] <skunkworks> (it doesn't take much for us I guess)
[12:49:49] <jepler> don't put me in the POO pen !!
[12:50:10] <jepler> (purchase order open?)
[12:58:30] <skunkworks> yes ;)
[14:30:12] <SWPadnos> oh boy
[14:30:18] <jepler> hi SWPadnos !
[14:30:24] <SWPadnos> hi
[14:30:31] <SWPadnos> looking at your earlier question